]> git.ipfire.org Git - thirdparty/valgrind.git/commitdiff
Implement YIELD. Followup to #348377.
authorJulian Seward <jseward@acm.org>
Tue, 18 Aug 2015 19:55:16 +0000 (19:55 +0000)
committerJulian Seward <jseward@acm.org>
Tue, 18 Aug 2015 19:55:16 +0000 (19:55 +0000)
git-svn-id: svn://svn.valgrind.org/vex/trunk@3178

VEX/priv/guest_arm64_toIR.c
VEX/priv/host_arm64_defs.c
VEX/priv/host_arm64_isel.c

index 39cb4f316b463319920d889fd843182021430e41..d9c03cc5b08dc9e88f748fc166773a8603ff8daf 100644 (file)
@@ -6859,6 +6859,19 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn,
       return True;
    }
 
+   /* ------------------- YIELD ------------------- */
+   /* 31        23        15        7
+      1101 0101 0000 0011 0010 0000 0011 1111
+   */
+   if (INSN(31,0) == 0xD503203F) {
+      /* Request yield followed by continuation at the next insn. */
+      putPC(mkU64(guest_PC_curr_instr + 4));
+      dres->whatNext    = Dis_StopHere;
+      dres->jk_StopHere = Ijk_Yield;
+      DIP("yield\n");
+      return True;
+   }
+
   //fail:
    vex_printf("ARM64 front end: branch_etc\n");
    return False;
index b886e81cc2c6a8a7b6d3e2b713e3ba352222d642..90de091cb9588c503ba0b1e4312a6a2fb9224537 100644 (file)
@@ -3617,7 +3617,7 @@ Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc,
             case Ijk_ClientReq:   trcval = VEX_TRC_JMP_CLIENTREQ;   break;
             case Ijk_Sys_syscall: trcval = VEX_TRC_JMP_SYS_SYSCALL; break;
             //case Ijk_Sys_int128:  trcval = VEX_TRC_JMP_SYS_INT128;  break;
-            //case Ijk_Yield:       trcval = VEX_TRC_JMP_YIELD;       break;
+            case Ijk_Yield:       trcval = VEX_TRC_JMP_YIELD;       break;
             //case Ijk_EmWarn:      trcval = VEX_TRC_JMP_EMWARN;      break;
             //case Ijk_MapFail:     trcval = VEX_TRC_JMP_MAPFAIL;     break;
             case Ijk_NoDecode:    trcval = VEX_TRC_JMP_NODECODE;    break;
index 0568fdeff53001f9c0e4d469a797e69f6b2c1411..74dc1619a23574485173b82a71cf5198eb21cceb 100644 (file)
@@ -3975,6 +3975,7 @@ static void iselNext ( ISelEnv* env,
       case Ijk_InvalICache:
       case Ijk_FlushDCache:
       case Ijk_SigTRAP:
+      case Ijk_Yield:
       {
          HReg        r    = iselIntExpr_R(env, next);
          ARM64AMode* amPC = mk_baseblock_64bit_access_amode(offsIP);