(define_insn "*movdi_64"
[(set (match_operand:DI 0 "nonimmediate_operand"
- "=d, d, d, d, d, d, d, d,f,d,d,d,d,d,T,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,v,v,v,d,v,R,d")
+ "=d, d, d, d, d, d, d, d,f,d,!*f,d,d,d,d,T,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,v,v,v,d,v,R,d")
(match_operand:DI 1 "general_operand"
- " K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,L,b,d,T,d, *f, R, T,*f,*f,d,K,t,d,t,Q,K,v,d,v,R,v,ZL"))]
+ " K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,j00,L,b,d,T,d, *f, R, T,*f,*f,d,K,t,d,t,Q,K,v,d,v,R,v,ZL"))]
"TARGET_ZARCH"
"@
lghi\t%0,%h1
llilf\t%0,%k1
ldgr\t%0,%1
lgdr\t%0,%1
+ lzdr\t%0
lay\t%0,%a1
lgrl\t%0,%1
lgr\t%0,%1
vleg\t%v0,%1,0
vsteg\t%v1,%0,0
larl\t%0,%1"
- [(set_attr "op_type" "RI,RI,RI,RI,RI,RIL,RIL,RIL,RRE,RRE,RXY,RIL,RRE,RXY,
+ [(set_attr "op_type" "RI,RI,RI,RI,RI,RIL,RIL,RIL,RRE,RRE,RRE,RXY,RIL,RRE,RXY,
RXY,RR,RX,RXY,RX,RXY,RIL,SIL,*,*,RS,RS,VRI,VRR,VRS,VRS,
VRX,VRX,RIL")
- (set_attr "type" "*,*,*,*,*,*,*,*,floaddf,floaddf,la,larl,lr,load,store,
+ (set_attr "type" "*,*,*,*,*,*,*,*,floaddf,floaddf,fsimpdf,la,larl,lr,load,store,
floaddf,floaddf,floaddf,fstoredf,fstoredf,larl,*,*,*,*,
*,*,*,*,*,*,*,larl")
- (set_attr "cpu_facility" "*,*,*,*,*,extimm,extimm,extimm,dfp,dfp,longdisp,
+ (set_attr "cpu_facility" "*,*,*,*,*,extimm,extimm,extimm,dfp,dfp,*,longdisp,
z10,*,*,*,*,*,longdisp,*,longdisp,
z10,z10,*,*,*,*,vx,vx,vx,vx,vx,vx,*")
(set_attr "z10prop" "z10_fwd_A1,
z10_fwd_E1,
*,
*,
+ *,
z10_fwd_A1,
z10_fwd_A3,
z10_fr_E1,
*,
*,*,*,*,*,*,*,
z10_super_A1")
- (set_attr "relative_long" "*,*,*,*,*,*,*,*,*,*,
+ (set_attr "relative_long" "*,*,*,*,*,*,*,*,*,*,*,
*,yes,*,*,*,*,*,*,*,*,
yes,*,*,*,*,*,*,*,*,*,
*,*,yes")
(define_insn "*movdi_31"
[(set (match_operand:DI 0 "nonimmediate_operand"
- "=d,d,Q,S,d ,o,!*f,!*f,!*f,!R,!T,d")
+ "=d,d,Q,S,d ,o,!*f,!*f,!*f,!*f,!R,!T,d")
(match_operand:DI 1 "general_operand"
- " Q,S,d,d,dPT,d, *f, R, T,*f,*f,b"))]
+ " Q,S,d,d,dPT,d, *f, R, T,j00,*f,*f,b"))]
"!TARGET_ZARCH"
"@
lm\t%0,%N0,%S1
ldr\t%0,%1
ld\t%0,%1
ldy\t%0,%1
+ lzdr\t%0
std\t%1,%0
stdy\t%1,%0
#"
- [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RX,RXY,*")
- (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fstoredf,fstoredf,*")
- (set_attr "cpu_facility" "*,longdisp,*,longdisp,*,*,*,*,longdisp,*,longdisp,z10")])
+ [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RRE,RX,RXY,*")
+ (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fsimpdf,fstoredf,fstoredf,*")
+ (set_attr "cpu_facility" "*,longdisp,*,longdisp,*,*,*,*,longdisp,*,*,longdisp,z10")])
; For a load from a symbol ref we can use one of the target registers
; together with larl to load the address.