--- /dev/null
+// { dg-do run }
+// { dg-require-effective-target dfp }
+
+extern "C" void abort ();
+
+#include <decimal/decimal>
+
+using namespace std::decimal;
+
+int
+foo (double fp)
+{
+ if (fp < 32.0)
+ throw (decimal32)32;
+ if (fp < 64.0)
+ throw (decimal64)64;
+ if (fp < 128.0)
+ throw (decimal128)128;
+ return 0;
+}
+
+int bar (double fp)
+{
+ try
+ {
+ foo (fp);
+ abort ();
+ }
+ catch (decimal32 df)
+ {
+ if (df != (decimal32)32)
+ abort ();
+ }
+ catch (decimal64 dd)
+ {
+ if (dd != (decimal64)64)
+ abort ();
+ }
+ catch (decimal128 dl)
+ {
+ if (dl != (decimal128)128)
+ abort ();
+ }
+ return 0;
+}
+
+int
+main ()
+{
+ bar (10.0);
+ bar (20.0);
+ bar (100.0);
+ return 0;
+}
--- /dev/null
+// { dg-do run }
+// { dg-require-effective-target dfp }
+
+extern "C" void abort ();
+
+typedef float dec32 __attribute__((mode(SD)));
+typedef float dec64 __attribute__((mode(DD)));
+typedef float dec128 __attribute__((mode(TD)));
+
+int
+foo (double fp)
+{
+ if (fp < 32.0)
+ throw (dec32)32;
+ if (fp < 64.0)
+ throw (dec64)64;
+ if (fp < 128.0)
+ throw (dec128)128;
+ return 0;
+}
+
+int bar (double fp)
+{
+ try
+ {
+ foo (fp);
+ abort ();
+ }
+ catch (dec32 df)
+ {
+ if (df != (dec32)32)
+ abort ();
+ }
+ catch (dec64 dd)
+ {
+ if (dd != (dec64)64)
+ abort ();
+ }
+ catch (dec128 dl)
+ {
+ if (dl != (dec128)128)
+ abort ();
+ }
+ return 0;
+}
+
+int
+main ()
+{
+ bar (10.0);
+ bar (20.0);
+ bar (100.0);
+ return 0;
+}
--- /dev/null
+// { dg-do run { target aarch64*-*-* } }
+// { dg-require-effective-target dfp }
+
+/* Test unwinding of AArch64 register saves. */
+/* We cannot use #include <decimal/decimal> because it defines
+ decimal* types as classes, which cannot be assigned to register
+ variables. Hence the use the mode attribute trick. */
+
+#ifdef __aarch64__
+
+typedef float dec64 __attribute__((mode(DD)));
+
+extern "C" void abort (void);
+extern "C" void exit (int);
+
+void
+foo (void)
+{
+ register dec64 v10 asm("v10") = 0;
+ register dec64 v11 asm("v11") = 1;
+ register dec64 v12 asm("v12") = 2;
+ register dec64 v13 asm("v13") = 3;
+ asm volatile ("" : "+w" (v10), "+w" (v11), "+w" (v12), "+w" (v13));
+ throw "";
+}
+
+int
+main (void)
+{
+ register dec64 v10 asm("v10") = 10;
+ register dec64 v11 asm("v11") = 11;
+ register dec64 v12 asm("v12") = 12;
+ register dec64 v13 asm("v13") = 13;
+ asm volatile ("" : "+w" (v10), "+w" (v11), "+w" (v12), "+w" (v13));
+ try {
+ foo ();
+ } catch (...) {
+ asm volatile ("" : "+w" (v10), "+w" (v11), "+w" (v12), "+w" (v13));
+ if (v10 != 10 || v11 != 11 || v12 != 12 || v13 != 13)
+ abort ();
+ }
+ exit (0);
+}
+#else
+int
+main (void)
+{
+}
+#endif