]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
interconnect: qcom: qdu1000: convert to dynamic IDs
authorDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Fri, 31 Oct 2025 14:45:26 +0000 (16:45 +0200)
committerGeorgi Djakov <djakov@kernel.org>
Sun, 2 Nov 2025 21:17:07 +0000 (23:17 +0200)
Stop using fixed and IDs and covert the platform to use dynamic IDs for
the interconnect. This gives more flexibility and also allows us to drop
the .num_links member, saving from possible errors related to it being
not set or set incorrectly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251031-rework-icc-v3-10-0575304c9624@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
drivers/interconnect/qcom/qdu1000.c
drivers/interconnect/qcom/qdu1000.h [deleted file]

index a7392eb73d4a990ec65e9d55f3d0429d05270802..4de0f17e4c57f77e9bd6f8bc7108359c4370c396 100644 (file)
 #include "bcm-voter.h"
 #include "icc-common.h"
 #include "icc-rpmh.h"
-#include "qdu1000.h"
+
+static struct qcom_icc_node qup0_core_master;
+static struct qcom_icc_node qup1_core_master;
+static struct qcom_icc_node alm_sys_tcu;
+static struct qcom_icc_node chm_apps;
+static struct qcom_icc_node qnm_ecpri_dma;
+static struct qcom_icc_node qnm_fec_2_gemnoc;
+static struct qcom_icc_node qnm_pcie;
+static struct qcom_icc_node qnm_snoc_gc;
+static struct qcom_icc_node qnm_snoc_sf;
+static struct qcom_icc_node qxm_mdsp;
+static struct qcom_icc_node llcc_mc;
+static struct qcom_icc_node qhm_gic;
+static struct qcom_icc_node qhm_qdss_bam;
+static struct qcom_icc_node qhm_qpic;
+static struct qcom_icc_node qhm_qspi;
+static struct qcom_icc_node qhm_qup0;
+static struct qcom_icc_node qhm_qup1;
+static struct qcom_icc_node qhm_system_noc_cfg;
+static struct qcom_icc_node qnm_aggre_noc;
+static struct qcom_icc_node qnm_aggre_noc_gsi;
+static struct qcom_icc_node qnm_gemnoc_cnoc;
+static struct qcom_icc_node qnm_gemnoc_modem_slave;
+static struct qcom_icc_node qnm_gemnoc_pcie;
+static struct qcom_icc_node qxm_crypto;
+static struct qcom_icc_node qxm_ecpri_gsi;
+static struct qcom_icc_node qxm_pimem;
+static struct qcom_icc_node xm_ecpri_dma;
+static struct qcom_icc_node xm_gic;
+static struct qcom_icc_node xm_pcie;
+static struct qcom_icc_node xm_qdss_etr0;
+static struct qcom_icc_node xm_qdss_etr1;
+static struct qcom_icc_node xm_sdc;
+static struct qcom_icc_node xm_usb3;
+static struct qcom_icc_node qup0_core_slave;
+static struct qcom_icc_node qup1_core_slave;
+static struct qcom_icc_node qns_gem_noc_cnoc;
+static struct qcom_icc_node qns_llcc;
+static struct qcom_icc_node qns_modem_slave;
+static struct qcom_icc_node qns_pcie;
+static struct qcom_icc_node ebi;
+static struct qcom_icc_node qhs_ahb2phy0_south;
+static struct qcom_icc_node qhs_ahb2phy1_north;
+static struct qcom_icc_node qhs_ahb2phy2_east;
+static struct qcom_icc_node qhs_aoss;
+static struct qcom_icc_node qhs_clk_ctl;
+static struct qcom_icc_node qhs_cpr_cx;
+static struct qcom_icc_node qhs_cpr_mx;
+static struct qcom_icc_node qhs_crypto_cfg;
+static struct qcom_icc_node qhs_ecpri_cfg;
+static struct qcom_icc_node qhs_imem_cfg;
+static struct qcom_icc_node qhs_ipc_router;
+static struct qcom_icc_node qhs_mss_cfg;
+static struct qcom_icc_node qhs_pcie_cfg;
+static struct qcom_icc_node qhs_pdm;
+static struct qcom_icc_node qhs_pimem_cfg;
+static struct qcom_icc_node qhs_prng;
+static struct qcom_icc_node qhs_qdss_cfg;
+static struct qcom_icc_node qhs_qpic;
+static struct qcom_icc_node qhs_qspi;
+static struct qcom_icc_node qhs_qup0;
+static struct qcom_icc_node qhs_qup1;
+static struct qcom_icc_node qhs_sdc2;
+static struct qcom_icc_node qhs_smbus_cfg;
+static struct qcom_icc_node qhs_system_noc_cfg;
+static struct qcom_icc_node qhs_tcsr;
+static struct qcom_icc_node qhs_tlmm;
+static struct qcom_icc_node qhs_tme_cfg;
+static struct qcom_icc_node qhs_tsc_cfg;
+static struct qcom_icc_node qhs_usb3;
+static struct qcom_icc_node qhs_vsense_ctrl_cfg;
+static struct qcom_icc_node qns_a1noc_snoc;
+static struct qcom_icc_node qns_anoc_snoc_gsi;
+static struct qcom_icc_node qns_ddrss_cfg;
+static struct qcom_icc_node qns_ecpri_gemnoc;
+static struct qcom_icc_node qns_gemnoc_gc;
+static struct qcom_icc_node qns_gemnoc_sf;
+static struct qcom_icc_node qns_modem;
+static struct qcom_icc_node qns_pcie_gemnoc;
+static struct qcom_icc_node qxs_imem;
+static struct qcom_icc_node qxs_pimem;
+static struct qcom_icc_node srvc_system_noc;
+static struct qcom_icc_node xs_ethernet_ss;
+static struct qcom_icc_node xs_pcie;
+static struct qcom_icc_node xs_qdss_stm;
+static struct qcom_icc_node xs_sys_tcu_cfg;
 
 static struct qcom_icc_node qup0_core_master = {
        .name = "qup0_core_master",
-       .id = QDU1000_MASTER_QUP_CORE_0,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_QUP_CORE_0 },
+       .link_nodes = { &qup0_core_slave },
 };
 
 static struct qcom_icc_node qup1_core_master = {
        .name = "qup1_core_master",
-       .id = QDU1000_MASTER_QUP_CORE_1,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_QUP_CORE_1 },
+       .link_nodes = { &qup1_core_slave },
 };
 
 static struct qcom_icc_node alm_sys_tcu = {
        .name = "alm_sys_tcu",
-       .id = QDU1000_MASTER_SYS_TCU,
        .channels = 1,
        .buswidth = 8,
        .num_links = 2,
-       .links = { QDU1000_SLAVE_GEM_NOC_CNOC, QDU1000_SLAVE_LLCC },
+       .link_nodes = { &qns_gem_noc_cnoc, &qns_llcc },
 };
 
 static struct qcom_icc_node chm_apps = {
        .name = "chm_apps",
-       .id = QDU1000_MASTER_APPSS_PROC,
        .channels = 1,
        .buswidth = 16,
        .num_links = 4,
-       .links = { QDU1000_SLAVE_GEM_NOC_CNOC, QDU1000_SLAVE_LLCC,
-                  QDU1000_SLAVE_GEMNOC_MODEM_CNOC, QDU1000_SLAVE_MEM_NOC_PCIE_SNOC
-       },
+       .link_nodes = { &qns_gem_noc_cnoc, &qns_llcc,
+                       &qns_modem_slave, &qns_pcie },
 };
 
 static struct qcom_icc_node qnm_ecpri_dma = {
        .name = "qnm_ecpri_dma",
-       .id = QDU1000_MASTER_GEMNOC_ECPRI_DMA,
        .channels = 2,
        .buswidth = 32,
        .num_links = 2,
-       .links = { QDU1000_SLAVE_GEM_NOC_CNOC, QDU1000_SLAVE_LLCC },
+       .link_nodes = { &qns_gem_noc_cnoc, &qns_llcc },
 };
 
 static struct qcom_icc_node qnm_fec_2_gemnoc = {
        .name = "qnm_fec_2_gemnoc",
-       .id = QDU1000_MASTER_FEC_2_GEMNOC,
        .channels = 2,
        .buswidth = 32,
        .num_links = 2,
-       .links = { QDU1000_SLAVE_GEM_NOC_CNOC, QDU1000_SLAVE_LLCC },
+       .link_nodes = { &qns_gem_noc_cnoc, &qns_llcc },
 };
 
 static struct qcom_icc_node qnm_pcie = {
        .name = "qnm_pcie",
-       .id = QDU1000_MASTER_ANOC_PCIE_GEM_NOC,
        .channels = 1,
        .buswidth = 64,
        .num_links = 3,
-       .links = { QDU1000_SLAVE_GEM_NOC_CNOC, QDU1000_SLAVE_LLCC,
-                  QDU1000_SLAVE_GEMNOC_MODEM_CNOC
-       },
+       .link_nodes = { &qns_gem_noc_cnoc, &qns_llcc,
+                       &qns_modem_slave },
 };
 
 static struct qcom_icc_node qnm_snoc_gc = {
        .name = "qnm_snoc_gc",
-       .id = QDU1000_MASTER_SNOC_GC_MEM_NOC,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_LLCC },
+       .link_nodes = { &qns_llcc },
 };
 
 static struct qcom_icc_node qnm_snoc_sf = {
        .name = "qnm_snoc_sf",
-       .id = QDU1000_MASTER_SNOC_SF_MEM_NOC,
        .channels = 1,
        .buswidth = 16,
        .num_links = 4,
-       .links = { QDU1000_SLAVE_GEM_NOC_CNOC, QDU1000_SLAVE_LLCC,
-                  QDU1000_SLAVE_GEMNOC_MODEM_CNOC, QDU1000_SLAVE_MEM_NOC_PCIE_SNOC
-       },
+       .link_nodes = { &qns_gem_noc_cnoc, &qns_llcc,
+                       &qns_modem_slave, &qns_pcie },
 };
 
 static struct qcom_icc_node qxm_mdsp = {
        .name = "qxm_mdsp",
-       .id = QDU1000_MASTER_MSS_PROC,
        .channels = 1,
        .buswidth = 16,
        .num_links = 3,
-       .links = { QDU1000_SLAVE_GEM_NOC_CNOC, QDU1000_SLAVE_LLCC,
-                  QDU1000_SLAVE_MEM_NOC_PCIE_SNOC
-       },
+       .link_nodes = { &qns_gem_noc_cnoc, &qns_llcc,
+                       &qns_pcie },
 };
 
 static struct qcom_icc_node llcc_mc = {
        .name = "llcc_mc",
-       .id = QDU1000_MASTER_LLCC,
        .channels = 8,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_EBI1 },
+       .link_nodes = { &ebi },
 };
 
 static struct qcom_icc_node qhm_gic = {
        .name = "qhm_gic",
-       .id = QDU1000_MASTER_GIC_AHB,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_SNOC_GEM_NOC_SF },
+       .link_nodes = { &qns_gemnoc_sf },
 };
 
 static struct qcom_icc_node qhm_qdss_bam = {
        .name = "qhm_qdss_bam",
-       .id = QDU1000_MASTER_QDSS_BAM,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_SNOC_GEM_NOC_SF },
+       .link_nodes = { &qns_gemnoc_sf },
 };
 
 static struct qcom_icc_node qhm_qpic = {
        .name = "qhm_qpic",
-       .id = QDU1000_MASTER_QPIC,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_A1NOC_SNOC },
+       .link_nodes = { &qns_a1noc_snoc },
 };
 
 static struct qcom_icc_node qhm_qspi = {
        .name = "qhm_qspi",
-       .id = QDU1000_MASTER_QSPI_0,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_A1NOC_SNOC },
+       .link_nodes = { &qns_a1noc_snoc },
 };
 
 static struct qcom_icc_node qhm_qup0 = {
        .name = "qhm_qup0",
-       .id = QDU1000_MASTER_QUP_0,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_A1NOC_SNOC },
+       .link_nodes = { &qns_a1noc_snoc },
 };
 
 static struct qcom_icc_node qhm_qup1 = {
        .name = "qhm_qup1",
-       .id = QDU1000_MASTER_QUP_1,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_A1NOC_SNOC },
+       .link_nodes = { &qns_a1noc_snoc },
 };
 
 static struct qcom_icc_node qhm_system_noc_cfg = {
        .name = "qhm_system_noc_cfg",
-       .id = QDU1000_MASTER_SNOC_CFG,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_SERVICE_SNOC },
+       .link_nodes = { &srvc_system_noc },
 };
 
 static struct qcom_icc_node qnm_aggre_noc = {
        .name = "qnm_aggre_noc",
-       .id = QDU1000_MASTER_ANOC_SNOC,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_SNOC_GEM_NOC_SF },
+       .link_nodes = { &qns_gemnoc_sf },
 };
 
 static struct qcom_icc_node qnm_aggre_noc_gsi = {
        .name = "qnm_aggre_noc_gsi",
-       .id = QDU1000_MASTER_ANOC_GSI,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_SNOC_GEM_NOC_GC },
+       .link_nodes = { &qns_gemnoc_gc },
 };
 
 static struct qcom_icc_node qnm_gemnoc_cnoc = {
        .name = "qnm_gemnoc_cnoc",
-       .id = QDU1000_MASTER_GEM_NOC_CNOC,
        .channels = 1,
        .buswidth = 16,
        .num_links = 36,
-       .links = { QDU1000_SLAVE_AHB2PHY_SOUTH, QDU1000_SLAVE_AHB2PHY_NORTH,
-                  QDU1000_SLAVE_AHB2PHY_EAST, QDU1000_SLAVE_AOSS,
-                  QDU1000_SLAVE_CLK_CTL, QDU1000_SLAVE_RBCPR_CX_CFG,
-                  QDU1000_SLAVE_RBCPR_MX_CFG, QDU1000_SLAVE_CRYPTO_0_CFG,
-                  QDU1000_SLAVE_ECPRI_CFG, QDU1000_SLAVE_IMEM_CFG,
-                  QDU1000_SLAVE_IPC_ROUTER_CFG, QDU1000_SLAVE_CNOC_MSS,
-                  QDU1000_SLAVE_PCIE_CFG, QDU1000_SLAVE_PDM,
-                  QDU1000_SLAVE_PIMEM_CFG, QDU1000_SLAVE_PRNG,
-                  QDU1000_SLAVE_QDSS_CFG, QDU1000_SLAVE_QPIC,
-                  QDU1000_SLAVE_QSPI_0, QDU1000_SLAVE_QUP_0,
-                  QDU1000_SLAVE_QUP_1, QDU1000_SLAVE_SDCC_2,
-                  QDU1000_SLAVE_SMBUS_CFG, QDU1000_SLAVE_SNOC_CFG,
-                  QDU1000_SLAVE_TCSR, QDU1000_SLAVE_TLMM,
-                  QDU1000_SLAVE_TME_CFG, QDU1000_SLAVE_TSC_CFG,
-                  QDU1000_SLAVE_USB3_0, QDU1000_SLAVE_VSENSE_CTRL_CFG,
-                  QDU1000_SLAVE_DDRSS_CFG, QDU1000_SLAVE_IMEM,
-                  QDU1000_SLAVE_PIMEM, QDU1000_SLAVE_ETHERNET_SS,
-                  QDU1000_SLAVE_QDSS_STM, QDU1000_SLAVE_TCU
-       },
+       .link_nodes = { &qhs_ahb2phy0_south, &qhs_ahb2phy1_north,
+                       &qhs_ahb2phy2_east, &qhs_aoss,
+                       &qhs_clk_ctl, &qhs_cpr_cx,
+                       &qhs_cpr_mx, &qhs_crypto_cfg,
+                       &qhs_ecpri_cfg, &qhs_imem_cfg,
+                       &qhs_ipc_router, &qhs_mss_cfg,
+                       &qhs_pcie_cfg, &qhs_pdm,
+                       &qhs_pimem_cfg, &qhs_prng,
+                       &qhs_qdss_cfg, &qhs_qpic,
+                       &qhs_qspi, &qhs_qup0,
+                       &qhs_qup1, &qhs_sdc2,
+                       &qhs_smbus_cfg, &qhs_system_noc_cfg,
+                       &qhs_tcsr, &qhs_tlmm,
+                       &qhs_tme_cfg, &qhs_tsc_cfg,
+                       &qhs_usb3, &qhs_vsense_ctrl_cfg,
+                       &qns_ddrss_cfg, &qxs_imem,
+                       &qxs_pimem, &xs_ethernet_ss,
+                       &xs_qdss_stm, &xs_sys_tcu_cfg },
 };
 
 static struct qcom_icc_node qnm_gemnoc_modem_slave = {
        .name = "qnm_gemnoc_modem_slave",
-       .id = QDU1000_MASTER_GEMNOC_MODEM_CNOC,
        .channels = 1,
        .buswidth = 16,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_MODEM_OFFLINE },
+       .link_nodes = { &qns_modem },
 };
 
 static struct qcom_icc_node qnm_gemnoc_pcie = {
        .name = "qnm_gemnoc_pcie",
-       .id = QDU1000_MASTER_GEM_NOC_PCIE_SNOC,
        .channels = 1,
        .buswidth = 16,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_PCIE_0 },
+       .link_nodes = { &xs_pcie },
 };
 
 static struct qcom_icc_node qxm_crypto = {
        .name = "qxm_crypto",
-       .id = QDU1000_MASTER_CRYPTO,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_A1NOC_SNOC },
+       .link_nodes = { &qns_a1noc_snoc },
 };
 
 static struct qcom_icc_node qxm_ecpri_gsi = {
        .name = "qxm_ecpri_gsi",
-       .id = QDU1000_MASTER_ECPRI_GSI,
        .channels = 1,
        .buswidth = 8,
        .num_links = 2,
-       .links = { QDU1000_SLAVE_ANOC_SNOC_GSI, QDU1000_SLAVE_PCIE_0 },
+       .link_nodes = { &qns_anoc_snoc_gsi, &xs_pcie },
 };
 
 static struct qcom_icc_node qxm_pimem = {
        .name = "qxm_pimem",
-       .id = QDU1000_MASTER_PIMEM,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_SNOC_GEM_NOC_GC },
+       .link_nodes = { &qns_gemnoc_gc },
 };
 
 static struct qcom_icc_node xm_ecpri_dma = {
        .name = "xm_ecpri_dma",
-       .id = QDU1000_MASTER_SNOC_ECPRI_DMA,
        .channels = 2,
        .buswidth = 32,
        .num_links = 2,
-       .links = { QDU1000_SLAVE_ECPRI_GEMNOC, QDU1000_SLAVE_PCIE_0 },
+       .link_nodes = { &qns_ecpri_gemnoc, &xs_pcie },
 };
 
 static struct qcom_icc_node xm_gic = {
        .name = "xm_gic",
-       .id = QDU1000_MASTER_GIC,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_SNOC_GEM_NOC_GC },
+       .link_nodes = { &qns_gemnoc_gc },
 };
 
 static struct qcom_icc_node xm_pcie = {
        .name = "xm_pcie",
-       .id = QDU1000_MASTER_PCIE,
        .channels = 1,
        .buswidth = 64,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_ANOC_PCIE_GEM_NOC },
+       .link_nodes = { &qns_pcie_gemnoc },
 };
 
 static struct qcom_icc_node xm_qdss_etr0 = {
        .name = "xm_qdss_etr0",
-       .id = QDU1000_MASTER_QDSS_ETR,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_SNOC_GEM_NOC_SF },
+       .link_nodes = { &qns_gemnoc_sf },
 };
 
 static struct qcom_icc_node xm_qdss_etr1 = {
        .name = "xm_qdss_etr1",
-       .id = QDU1000_MASTER_QDSS_ETR_1,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_SNOC_GEM_NOC_SF },
+       .link_nodes = { &qns_gemnoc_sf },
 };
 
 static struct qcom_icc_node xm_sdc = {
        .name = "xm_sdc",
-       .id = QDU1000_MASTER_SDCC_1,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_A1NOC_SNOC },
+       .link_nodes = { &qns_a1noc_snoc },
 };
 
 static struct qcom_icc_node xm_usb3 = {
        .name = "xm_usb3",
-       .id = QDU1000_MASTER_USB3,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_SLAVE_A1NOC_SNOC },
+       .link_nodes = { &qns_a1noc_snoc },
 };
 
 static struct qcom_icc_node qup0_core_slave = {
        .name = "qup0_core_slave",
-       .id = QDU1000_SLAVE_QUP_CORE_0,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qup1_core_slave = {
        .name = "qup1_core_slave",
-       .id = QDU1000_SLAVE_QUP_CORE_1,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qns_gem_noc_cnoc = {
        .name = "qns_gem_noc_cnoc",
-       .id = QDU1000_SLAVE_GEM_NOC_CNOC,
        .channels = 1,
        .buswidth = 16,
        .num_links = 1,
-       .links = { QDU1000_MASTER_GEM_NOC_CNOC },
+       .link_nodes = { &qnm_gemnoc_cnoc },
 };
 
 static struct qcom_icc_node qns_llcc = {
        .name = "qns_llcc",
-       .id = QDU1000_SLAVE_LLCC,
        .channels = 8,
        .buswidth = 16,
        .num_links = 1,
-       .links = { QDU1000_MASTER_LLCC },
+       .link_nodes = { &llcc_mc },
 };
 
 static struct qcom_icc_node qns_modem_slave = {
        .name = "qns_modem_slave",
-       .id = QDU1000_SLAVE_GEMNOC_MODEM_CNOC,
        .channels = 1,
        .buswidth = 16,
        .num_links = 1,
-       .links = { QDU1000_MASTER_GEMNOC_MODEM_CNOC },
+       .link_nodes = { &qnm_gemnoc_modem_slave },
 };
 
 static struct qcom_icc_node qns_pcie = {
        .name = "qns_pcie",
-       .id = QDU1000_SLAVE_MEM_NOC_PCIE_SNOC,
        .channels = 1,
        .buswidth = 16,
        .num_links = 1,
-       .links = { QDU1000_MASTER_GEM_NOC_PCIE_SNOC },
+       .link_nodes = { &qnm_gemnoc_pcie },
 };
 
 static struct qcom_icc_node ebi = {
        .name = "ebi",
-       .id = QDU1000_SLAVE_EBI1,
        .channels = 8,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_ahb2phy0_south = {
        .name = "qhs_ahb2phy0_south",
-       .id = QDU1000_SLAVE_AHB2PHY_SOUTH,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_ahb2phy1_north = {
        .name = "qhs_ahb2phy1_north",
-       .id = QDU1000_SLAVE_AHB2PHY_NORTH,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_ahb2phy2_east = {
        .name = "qhs_ahb2phy2_east",
-       .id = QDU1000_SLAVE_AHB2PHY_EAST,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_aoss = {
        .name = "qhs_aoss",
-       .id = QDU1000_SLAVE_AOSS,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_clk_ctl = {
        .name = "qhs_clk_ctl",
-       .id = QDU1000_SLAVE_CLK_CTL,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_cpr_cx = {
        .name = "qhs_cpr_cx",
-       .id = QDU1000_SLAVE_RBCPR_CX_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_cpr_mx = {
        .name = "qhs_cpr_mx",
-       .id = QDU1000_SLAVE_RBCPR_MX_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_crypto_cfg = {
        .name = "qhs_crypto_cfg",
-       .id = QDU1000_SLAVE_CRYPTO_0_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_ecpri_cfg = {
        .name = "qhs_ecpri_cfg",
-       .id = QDU1000_SLAVE_ECPRI_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_imem_cfg = {
        .name = "qhs_imem_cfg",
-       .id = QDU1000_SLAVE_IMEM_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_ipc_router = {
        .name = "qhs_ipc_router",
-       .id = QDU1000_SLAVE_IPC_ROUTER_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_mss_cfg = {
        .name = "qhs_mss_cfg",
-       .id = QDU1000_SLAVE_CNOC_MSS,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_pcie_cfg = {
        .name = "qhs_pcie_cfg",
-       .id = QDU1000_SLAVE_PCIE_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_pdm = {
        .name = "qhs_pdm",
-       .id = QDU1000_SLAVE_PDM,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_pimem_cfg = {
        .name = "qhs_pimem_cfg",
-       .id = QDU1000_SLAVE_PIMEM_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_prng = {
        .name = "qhs_prng",
-       .id = QDU1000_SLAVE_PRNG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_qdss_cfg = {
        .name = "qhs_qdss_cfg",
-       .id = QDU1000_SLAVE_QDSS_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_qpic = {
        .name = "qhs_qpic",
-       .id = QDU1000_SLAVE_QPIC,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_qspi = {
        .name = "qhs_qspi",
-       .id = QDU1000_SLAVE_QSPI_0,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_qup0 = {
        .name = "qhs_qup0",
-       .id = QDU1000_SLAVE_QUP_0,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_qup1 = {
        .name = "qhs_qup1",
-       .id = QDU1000_SLAVE_QUP_1,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_sdc2 = {
        .name = "qhs_sdc2",
-       .id = QDU1000_SLAVE_SDCC_2,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_smbus_cfg = {
        .name = "qhs_smbus_cfg",
-       .id = QDU1000_SLAVE_SMBUS_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_system_noc_cfg = {
        .name = "qhs_system_noc_cfg",
-       .id = QDU1000_SLAVE_SNOC_CFG,
        .channels = 1,
        .buswidth = 4,
        .num_links = 1,
-       .links = { QDU1000_MASTER_SNOC_CFG },
+       .link_nodes = { &qhm_system_noc_cfg },
 };
 
 static struct qcom_icc_node qhs_tcsr = {
        .name = "qhs_tcsr",
-       .id = QDU1000_SLAVE_TCSR,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_tlmm = {
        .name = "qhs_tlmm",
-       .id = QDU1000_SLAVE_TLMM,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_tme_cfg = {
        .name = "qhs_tme_cfg",
-       .id = QDU1000_SLAVE_TME_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_tsc_cfg = {
        .name = "qhs_tsc_cfg",
-       .id = QDU1000_SLAVE_TSC_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_usb3 = {
        .name = "qhs_usb3",
-       .id = QDU1000_SLAVE_USB3_0,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qhs_vsense_ctrl_cfg = {
        .name = "qhs_vsense_ctrl_cfg",
-       .id = QDU1000_SLAVE_VSENSE_CTRL_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qns_a1noc_snoc = {
        .name = "qns_a1noc_snoc",
-       .id = QDU1000_SLAVE_A1NOC_SNOC,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_MASTER_ANOC_SNOC },
+       .link_nodes = { &qnm_aggre_noc },
 };
 
 static struct qcom_icc_node qns_anoc_snoc_gsi = {
        .name = "qns_anoc_snoc_gsi",
-       .id = QDU1000_SLAVE_ANOC_SNOC_GSI,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_MASTER_ANOC_GSI },
+       .link_nodes = { &qnm_aggre_noc_gsi },
 };
 
 static struct qcom_icc_node qns_ddrss_cfg = {
        .name = "qns_ddrss_cfg",
-       .id = QDU1000_SLAVE_DDRSS_CFG,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qns_ecpri_gemnoc = {
        .name = "qns_ecpri_gemnoc",
-       .id = QDU1000_SLAVE_ECPRI_GEMNOC,
        .channels = 2,
        .buswidth = 32,
        .num_links = 1,
-       .links = { QDU1000_MASTER_GEMNOC_ECPRI_DMA },
+       .link_nodes = { &qnm_ecpri_dma },
 };
 
 static struct qcom_icc_node qns_gemnoc_gc = {
        .name = "qns_gemnoc_gc",
-       .id = QDU1000_SLAVE_SNOC_GEM_NOC_GC,
        .channels = 1,
        .buswidth = 8,
        .num_links = 1,
-       .links = { QDU1000_MASTER_SNOC_GC_MEM_NOC },
+       .link_nodes = { &qnm_snoc_gc },
 };
 
 static struct qcom_icc_node qns_gemnoc_sf = {
        .name = "qns_gemnoc_sf",
-       .id = QDU1000_SLAVE_SNOC_GEM_NOC_SF,
        .channels = 1,
        .buswidth = 16,
        .num_links = 1,
-       .links = { QDU1000_MASTER_SNOC_SF_MEM_NOC },
+       .link_nodes = { &qnm_snoc_sf },
 };
 
 static struct qcom_icc_node qns_modem = {
        .name = "qns_modem",
-       .id = QDU1000_SLAVE_MODEM_OFFLINE,
        .channels = 1,
        .buswidth = 32,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qns_pcie_gemnoc = {
        .name = "qns_pcie_gemnoc",
-       .id = QDU1000_SLAVE_ANOC_PCIE_GEM_NOC,
        .channels = 1,
        .buswidth = 64,
        .num_links = 1,
-       .links = { QDU1000_MASTER_ANOC_PCIE_GEM_NOC },
+       .link_nodes = { &qnm_pcie },
 };
 
 static struct qcom_icc_node qxs_imem = {
        .name = "qxs_imem",
-       .id = QDU1000_SLAVE_IMEM,
        .channels = 1,
        .buswidth = 8,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node qxs_pimem = {
        .name = "qxs_pimem",
-       .id = QDU1000_SLAVE_PIMEM,
        .channels = 1,
        .buswidth = 8,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node srvc_system_noc = {
        .name = "srvc_system_noc",
-       .id = QDU1000_SLAVE_SERVICE_SNOC,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node xs_ethernet_ss = {
        .name = "xs_ethernet_ss",
-       .id = QDU1000_SLAVE_ETHERNET_SS,
        .channels = 1,
        .buswidth = 32,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node xs_pcie = {
        .name = "xs_pcie",
-       .id = QDU1000_SLAVE_PCIE_0,
        .channels = 1,
        .buswidth = 64,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node xs_qdss_stm = {
        .name = "xs_qdss_stm",
-       .id = QDU1000_SLAVE_QDSS_STM,
        .channels = 1,
        .buswidth = 4,
-       .num_links = 0,
 };
 
 static struct qcom_icc_node xs_sys_tcu_cfg = {
        .name = "xs_sys_tcu_cfg",
-       .id = QDU1000_SLAVE_TCU,
        .channels = 1,
        .buswidth = 8,
-       .num_links = 0,
 };
 
 static struct qcom_icc_bcm bcm_acv = {
@@ -880,6 +834,7 @@ static struct qcom_icc_node * const clk_virt_nodes[] = {
 };
 
 static const struct qcom_icc_desc qdu1000_clk_virt = {
+       .alloc_dyn_id = true,
        .nodes = clk_virt_nodes,
        .num_nodes = ARRAY_SIZE(clk_virt_nodes),
        .bcms = clk_virt_bcms,
@@ -907,6 +862,7 @@ static struct qcom_icc_node * const gem_noc_nodes[] = {
 };
 
 static const struct qcom_icc_desc qdu1000_gem_noc = {
+       .alloc_dyn_id = true,
        .nodes = gem_noc_nodes,
        .num_nodes = ARRAY_SIZE(gem_noc_nodes),
        .bcms = gem_noc_bcms,
@@ -924,6 +880,7 @@ static struct qcom_icc_node * const mc_virt_nodes[] = {
 };
 
 static const struct qcom_icc_desc qdu1000_mc_virt = {
+       .alloc_dyn_id = true,
        .nodes = mc_virt_nodes,
        .num_nodes = ARRAY_SIZE(mc_virt_nodes),
        .bcms = mc_virt_bcms,
@@ -1010,6 +967,7 @@ static struct qcom_icc_node * const system_noc_nodes[] = {
 };
 
 static const struct qcom_icc_desc qdu1000_system_noc = {
+       .alloc_dyn_id = true,
        .nodes = system_noc_nodes,
        .num_nodes = ARRAY_SIZE(system_noc_nodes),
        .bcms = system_noc_bcms,
diff --git a/drivers/interconnect/qcom/qdu1000.h b/drivers/interconnect/qcom/qdu1000.h
deleted file mode 100644 (file)
index e75a641..0000000
+++ /dev/null
@@ -1,95 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
- */
-
-#ifndef __DRIVERS_INTERCONNECT_QCOM_QDU1000_H
-#define __DRIVERS_INTERCONNECT_QCOM_QDU1000_H
-
-#define QDU1000_MASTER_SYS_TCU                         0
-#define QDU1000_MASTER_APPSS_PROC                      1
-#define QDU1000_MASTER_LLCC                            2
-#define QDU1000_MASTER_GIC_AHB                         3
-#define QDU1000_MASTER_QDSS_BAM                                4
-#define QDU1000_MASTER_QPIC                            5
-#define QDU1000_MASTER_QSPI_0                          6
-#define QDU1000_MASTER_QUP_0                           7
-#define QDU1000_MASTER_QUP_1                           8
-#define QDU1000_MASTER_SNOC_CFG                                9
-#define QDU1000_MASTER_ANOC_SNOC                       10
-#define QDU1000_MASTER_ANOC_GSI                                11
-#define QDU1000_MASTER_GEMNOC_ECPRI_DMA                        12
-#define QDU1000_MASTER_FEC_2_GEMNOC                    13
-#define QDU1000_MASTER_GEM_NOC_CNOC                    14
-#define QDU1000_MASTER_GEMNOC_MODEM_CNOC               15
-#define QDU1000_MASTER_GEM_NOC_PCIE_SNOC               16
-#define QDU1000_MASTER_ANOC_PCIE_GEM_NOC               17
-#define QDU1000_MASTER_SNOC_GC_MEM_NOC                 18
-#define QDU1000_MASTER_SNOC_SF_MEM_NOC                 19
-#define QDU1000_MASTER_QUP_CORE_0                      20
-#define QDU1000_MASTER_QUP_CORE_1                      21
-#define QDU1000_MASTER_CRYPTO                          22
-#define QDU1000_MASTER_ECPRI_GSI                       23
-#define QDU1000_MASTER_MSS_PROC                                24
-#define QDU1000_MASTER_PIMEM                           25
-#define QDU1000_MASTER_SNOC_ECPRI_DMA                  26
-#define QDU1000_MASTER_GIC                             27
-#define QDU1000_MASTER_PCIE                            28
-#define QDU1000_MASTER_QDSS_ETR                                29
-#define QDU1000_MASTER_QDSS_ETR_1                      30
-#define QDU1000_MASTER_SDCC_1                          31
-#define QDU1000_MASTER_USB3                            32
-#define QDU1000_SLAVE_EBI1                             512
-#define QDU1000_SLAVE_AHB2PHY_SOUTH                    513
-#define QDU1000_SLAVE_AHB2PHY_NORTH                    514
-#define QDU1000_SLAVE_AHB2PHY_EAST                     515
-#define QDU1000_SLAVE_AOSS                             516
-#define QDU1000_SLAVE_CLK_CTL                          517
-#define QDU1000_SLAVE_RBCPR_CX_CFG                     518
-#define QDU1000_SLAVE_RBCPR_MX_CFG                     519
-#define QDU1000_SLAVE_CRYPTO_0_CFG                     520
-#define QDU1000_SLAVE_ECPRI_CFG                                521
-#define QDU1000_SLAVE_IMEM_CFG                         522
-#define QDU1000_SLAVE_IPC_ROUTER_CFG                   523
-#define QDU1000_SLAVE_CNOC_MSS                         524
-#define QDU1000_SLAVE_PCIE_CFG                         525
-#define QDU1000_SLAVE_PDM                              526
-#define QDU1000_SLAVE_PIMEM_CFG                                527
-#define QDU1000_SLAVE_PRNG                             528
-#define QDU1000_SLAVE_QDSS_CFG                         529
-#define QDU1000_SLAVE_QPIC                             530
-#define QDU1000_SLAVE_QSPI_0                           531
-#define QDU1000_SLAVE_QUP_0                            532
-#define QDU1000_SLAVE_QUP_1                            533
-#define QDU1000_SLAVE_SDCC_2                           534
-#define QDU1000_SLAVE_SMBUS_CFG                                535
-#define QDU1000_SLAVE_SNOC_CFG                         536
-#define QDU1000_SLAVE_TCSR                             537
-#define QDU1000_SLAVE_TLMM                             538
-#define QDU1000_SLAVE_TME_CFG                          539
-#define QDU1000_SLAVE_TSC_CFG                          540
-#define QDU1000_SLAVE_USB3_0                           541
-#define QDU1000_SLAVE_VSENSE_CTRL_CFG                  542
-#define QDU1000_SLAVE_A1NOC_SNOC                       543
-#define QDU1000_SLAVE_ANOC_SNOC_GSI                    544
-#define QDU1000_SLAVE_DDRSS_CFG                                545
-#define QDU1000_SLAVE_ECPRI_GEMNOC                     546
-#define QDU1000_SLAVE_GEM_NOC_CNOC                     547
-#define QDU1000_SLAVE_SNOC_GEM_NOC_GC                  548
-#define QDU1000_SLAVE_SNOC_GEM_NOC_SF                  549
-#define QDU1000_SLAVE_LLCC                             550
-#define QDU1000_SLAVE_MODEM_OFFLINE                    551
-#define QDU1000_SLAVE_GEMNOC_MODEM_CNOC                        552
-#define QDU1000_SLAVE_MEM_NOC_PCIE_SNOC                        553
-#define QDU1000_SLAVE_ANOC_PCIE_GEM_NOC                        554
-#define QDU1000_SLAVE_QUP_CORE_0                       555
-#define QDU1000_SLAVE_QUP_CORE_1                       556
-#define QDU1000_SLAVE_IMEM                             557
-#define QDU1000_SLAVE_PIMEM                            558
-#define QDU1000_SLAVE_SERVICE_SNOC                     559
-#define QDU1000_SLAVE_ETHERNET_SS                      560
-#define QDU1000_SLAVE_PCIE_0                           561
-#define QDU1000_SLAVE_QDSS_STM                         562
-#define QDU1000_SLAVE_TCU                              563
-
-#endif