irqchip/sifive-plic: Make use of __assign_bit()

[ Upstream commit 40d7af5375a4e27d8576d9d11954ac213d06f09e ]

Replace the open coded

if (foo)
        __set_bit(n, bar);
    else
        __clear_bit(n, bar);

with __assign_bit(). No functional change intended.

Signed-off-by: Hongbo Li <lihongbo22@huawei.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/all/20240902130824.2878644-1-lihongbo22@huawei.com
Stable-dep-of: f75e07bf5226 ("irqchip/sifive-plic: Avoid interrupt ID 0 handling during suspend/resume")
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 36dbcf2d728a546096f61dfe8e97fa2414b59db4..bf69a4802b71e7875b2a7c96ccaa0e0b3c7e9e70 100644 (file)
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -252,11 +252,10 @@ static int plic_irq_suspend(void)
 
        priv = per_cpu_ptr(&plic_handlers, smp_processor_id())->priv;
 
-       for (i = 0; i < priv->nr_irqs; i++)
-               if (readl(priv->regs + PRIORITY_BASE + i * PRIORITY_PER_ID))
-                       __set_bit(i, priv->prio_save);
-               else
-                       __clear_bit(i, priv->prio_save);
+       for (i = 0; i < priv->nr_irqs; i++) {
+               __assign_bit(i, priv->prio_save,
+                            readl(priv->regs + PRIORITY_BASE + i * PRIORITY_PER_ID));
+       }
 
        for_each_cpu(cpu, cpu_present_mask) {
                struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu);