drm/amdgpu: add support for GC IP version 11.5.4

This initializes GC IP version 11.5.4.

v2: squash in RLC offset fix

Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Tim Huang <tim.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 20d05a3e4516e80e1cfab65d27300561400a5d59..116cb437c81bbe730a8b1d4836c41dff3db35034 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -1988,6 +1988,7 @@ static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                amdgpu_device_ip_block_add(adev, &soc21_common_ip_block);
                break;
        case IP_VERSION(12, 0, 0):
@@ -2047,6 +2048,7 @@ static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                amdgpu_device_ip_block_add(adev, &gmc_v11_0_ip_block);
                break;
        case IP_VERSION(12, 0, 0):
@@ -2358,6 +2360,7 @@ static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                amdgpu_device_ip_block_add(adev, &gfx_v11_0_ip_block);
                break;
        case IP_VERSION(12, 0, 0):
@@ -2559,6 +2562,7 @@ static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                amdgpu_device_ip_block_add(adev, &mes_v11_0_ip_block);
                adev->enable_mes = true;
                adev->enable_mes_kiq = true;
@@ -2961,6 +2965,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                adev->family = AMDGPU_FAMILY_GC_11_5_0;
                break;
        case IP_VERSION(12, 0, 0):
@@ -2988,6 +2993,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                adev->flags |= AMD_IS_APU;
                break;
        default:

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index a6feecd0d61207a48dc0323abf6d0e1a79922f3b..6d7b8bb953aec3768fa69fd540019cc14b6cd5c2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -949,6 +949,7 @@ void amdgpu_gmc_tmz_set(struct amdgpu_device *adev)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                /* Don't enable it by default yet.
                 */
                if (amdgpu_tmz < 1) {

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 79a6977d56b0e07a6ee1d20e44f73e4ba0f4ad20..0e5b255eeda40fd48f9e52522d8af5afce9752aa 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -120,6 +120,10 @@ MODULE_FIRMWARE("amdgpu/gc_11_5_3_pfp.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_5_3_me.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_5_3_mec.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_5_3_rlc.bin");
+MODULE_FIRMWARE("amdgpu/gc_11_5_4_pfp.bin");
+MODULE_FIRMWARE("amdgpu/gc_11_5_4_me.bin");
+MODULE_FIRMWARE("amdgpu/gc_11_5_4_mec.bin");
+MODULE_FIRMWARE("amdgpu/gc_11_5_4_rlc.bin");
 
 static const struct amdgpu_hwip_reg_entry gc_reg_list_11_0[] = {
        SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS),
@@ -1113,6 +1117,7 @@ static int gfx_v11_0_gpu_early_init(struct amdgpu_device *adev)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                adev->gfx.config.max_hw_contexts = 8;
                adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;
                adev->gfx.config.sc_prim_fifo_size_backend = 0x100;
@@ -1595,6 +1600,7 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                adev->gfx.me.num_me = 1;
                adev->gfx.me.num_pipe_per_me = 1;
                adev->gfx.me.num_queue_per_pipe = 2;
@@ -3052,7 +3058,8 @@ static int gfx_v11_0_wait_for_rlc_autoload_complete(struct amdgpu_device *adev)
                    amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 5, 0) ||
                    amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 5, 1) ||
                    amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 5, 2) ||
-                   amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 5, 3))
+                   amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 5, 3) ||
+                   amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 5, 4))
                        bootload_status = RREG32_SOC15(GC, 0,
                                        regRLC_RLCS_BOOTLOAD_STATUS_gc_11_0_1);
                else
@@ -5640,6 +5647,7 @@ static void gfx_v11_cntl_power_gating(struct amdgpu_device *adev, bool enable)
                case IP_VERSION(11, 5, 1):
                case IP_VERSION(11, 5, 2):
                case IP_VERSION(11, 5, 3):
+               case IP_VERSION(11, 5, 4):
                        WREG32_SOC15(GC, 0, regRLC_PG_DELAY_3, RLC_PG_DELAY_3_DEFAULT_GC_11_0_1);
                        break;
                default:
@@ -5678,6 +5686,7 @@ static int gfx_v11_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                if (!enable)
                        amdgpu_gfx_off_ctrl(adev, false);
 
@@ -5712,6 +5721,7 @@ static int gfx_v11_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                gfx_v11_0_update_gfx_clock_gating(adev,
                                state ==  AMD_CG_STATE_GATE);
                break;

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 7a1f0742754a6977caad4212ac2a01dd687f73f3..ad5e512e3fb8a1408df5de52d0b15a94ccfa7a96 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -602,6 +602,7 @@ static void gmc_v11_0_set_gfxhub_funcs(struct amdgpu_device *adev)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                adev->gfxhub.funcs = &gfxhub_v11_5_0_funcs;
                break;
        default:
@@ -778,6 +779,7 @@ static int gmc_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);
                set_bit(AMDGPU_MMHUB0(0), adev->vmhubs_mask);
                /*

diff --git a/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c b/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
index cc626036ed9c3dc2e707588a31f11d39cfb1d74a..46d25d55ebbebd0d0ca0cfe32f5fe5108caaf221 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
@@ -41,6 +41,7 @@ MODULE_FIRMWARE("amdgpu/gc_11_5_0_imu.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_5_1_imu.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_5_2_imu.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_5_3_imu.bin");
+MODULE_FIRMWARE("amdgpu/gc_11_5_4_imu.bin");
 
 static int imu_v11_0_init_microcode(struct amdgpu_device *adev)
 {

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 5159f4a9787ca499a0ac1c86260496ec590419ae..f8678a7bec93c9543c78e7c54c49bbd3398a3623 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -56,6 +56,8 @@ MODULE_FIRMWARE("amdgpu/gc_11_5_2_mes_2.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_5_2_mes1.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_5_3_mes_2.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_5_3_mes1.bin");
+MODULE_FIRMWARE("amdgpu/gc_11_5_4_mes_2.bin");
+MODULE_FIRMWARE("amdgpu/gc_11_5_4_mes1.bin");
 
 static int mes_v11_0_hw_init(struct amdgpu_ip_block *ip_block);
 static int mes_v11_0_hw_fini(struct amdgpu_ip_block *ip_block);

diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 55c3781fc73045f500d9dd2cad7b5f7fadbe1e6e..99c4db3b2a232e98f4e9ea75d54e984d45deb8d1 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -799,6 +799,11 @@ static int soc21_common_early_init(struct amdgpu_ip_block *ip_block)
                        AMD_PG_SUPPORT_GFX_PG;
                adev->external_rev_id = adev->rev_id + 0x50;
                break;
+       case IP_VERSION(11, 5, 4):
+               adev->cg_flags = 0;
+               adev->pg_flags = 0;
+               adev->external_rev_id = adev->rev_id + 0x1;
+               break;
        default:
                /* FIXME: not supported yet */
                return -EINVAL;

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 5f2dd378936ed96ef4247d4df22051fe94b91001..36ffc3c7853673acf74280de54c8ef210bbd8546 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -1705,6 +1705,7 @@ int kfd_get_gpu_cache_info(struct kfd_node *kdev, struct kfd_gpu_cache_info **pc
                case IP_VERSION(11, 5, 1):
                case IP_VERSION(11, 5, 2):
                case IP_VERSION(11, 5, 3):
+               case IP_VERSION(11, 5, 4):
                        /* Cacheline size not available in IP discovery for gc11.
                         * kfd_fill_gpu_cache_info_from_gfx_config to hard code it
                         */

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 6d0b370b1644bc9b9d726b9deb562d31b49c82e5..fa6ae63490e53c890d07eff8d86bd48ffa612de8 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -164,6 +164,7 @@ static void kfd_device_info_set_event_interrupt_class(struct kfd_dev *kfd)
        case IP_VERSION(11, 5, 1):
        case IP_VERSION(11, 5, 2):
        case IP_VERSION(11, 5, 3):
+       case IP_VERSION(11, 5, 4):
                kfd->device_info.event_interrupt_class = &event_interrupt_class_v11;
                break;
        case IP_VERSION(12, 0, 0):
@@ -441,6 +442,10 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
                        gfx_target_version = 110503;
                        f2g = &gfx_v11_kfd2kgd;
                        break;
+               case IP_VERSION(11, 5, 4):
+                        gfx_target_version = 110504;
+                        f2g = &gfx_v11_kfd2kgd;
+                        break;
                case IP_VERSION(12, 0, 0):
                        gfx_target_version = 120000;
                        f2g = &gfx_v12_kfd2kgd;