ARM: OMAP2+: Fix l4ls clk domain handling in STANDBY

Don't put the l4ls clk domain to sleep in case of standby.
Since CM3 PM FW[1](ti-v4.1.y) doesn't wake-up/enable the l4ls clk domain
upon wake-up, CM3 PM FW fails to wake-up the MPU.

[1] https://git.ti.com/cgit/processor-firmware/ti-amx3-cm3-pm-firmware/

Signed-off-by: Sukrut Bellary <sbellary@baylibre.com>
Tested-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250318230042.3138542-2-sbellary@baylibre.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index c36fb27212615ae2c5014cb9a3e4517a95c55000..86a2f9e5d0ef9d8a883140fc3d054ba11ecb0f61 100644 (file)
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -48,6 +48,7 @@
 #define CLKDM_NO_AUTODEPS                      (1 << 4)
 #define CLKDM_ACTIVE_WITH_MPU                  (1 << 5)
 #define CLKDM_MISSING_IDLE_REPORTING           (1 << 6)
+#define CLKDM_STANDBY_FORCE_WAKEUP             BIT(7)
 
 #define CLKDM_CAN_HWSUP                (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
 #define CLKDM_CAN_SWSUP                (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)

diff --git a/arch/arm/mach-omap2/clockdomains33xx_data.c b/arch/arm/mach-omap2/clockdomains33xx_data.c
index 87f4e927eb1830e19d1c26d4daf8758c12f20a60..c05a3c07d44863640235fb06bcb8eede750fcaa4 100644 (file)
--- a/arch/arm/mach-omap2/clockdomains33xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains33xx_data.c
@@ -19,7 +19,7 @@ static struct clockdomain l4ls_am33xx_clkdm = {
        .pwrdm          = { .name = "per_pwrdm" },
        .cm_inst        = AM33XX_CM_PER_MOD,
        .clkdm_offs     = AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET,
-       .flags          = CLKDM_CAN_SWSUP,
+       .flags          = CLKDM_CAN_SWSUP | CLKDM_STANDBY_FORCE_WAKEUP,
 };
 
 static struct clockdomain l3s_am33xx_clkdm = {

diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index acdf72a541c02aa6718fd73dc9ed153cc881bd16..a4dd42abda89b0ad6d7fc7993d803a3e5a8c58bf 100644 (file)
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -20,6 +20,9 @@
 #include "cm-regbits-34xx.h"
 #include "cm-regbits-33xx.h"
 #include "prm33xx.h"
+#if IS_ENABLED(CONFIG_SUSPEND)
+#include <linux/suspend.h>
+#endif
 
 /*
  * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
@@ -328,8 +331,17 @@ static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)
 {
        bool hwsup = false;
 
+#if IS_ENABLED(CONFIG_SUSPEND)
+       /*
+        * In case of standby, Don't put the l4ls clk domain to sleep.
+        * Since CM3 PM FW doesn't wake-up/enable the l4ls clk domain
+        * upon wake-up, CM3 PM FW fails to wake-up th MPU.
+        */
+       if (pm_suspend_target_state == PM_SUSPEND_STANDBY &&
+           (clkdm->flags & CLKDM_STANDBY_FORCE_WAKEUP))
+               return 0;
+#endif
        hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
-
        if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
                am33xx_clkdm_sleep(clkdm);