drm/i915: relocate _VGA_MSR_WRITE register definition

Move _VGA_MSR_WRITE to intel_crt_regs.h. It's not necessarily the
optimal place for it, but hands down better than i915_reg.h.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241213115111.335474-2-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_crt_regs.h b/drivers/gpu/drm/i915/display/intel_crt_regs.h
index 9a93020b9a7e84a720b18a8c85e7c9df20622dd2..571a67ae9afaf2af8206ccd884b65183b114dae5 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_crt_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_crt_regs.h
@@ -45,4 +45,6 @@
 #define   ADPA_VSYNC_ACTIVE_HIGH               REG_BIT(4)
 #define   ADPA_HSYNC_ACTIVE_HIGH               REG_BIT(3)
 
+#define _VGA_MSR_WRITE _MMIO(0x3c2)
+
 #endif /* __INTEL_CRT_REGS_H__ */

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a204d0e7fdcfe4c7db31ff2ed1a1a3bb312f4b49..33cfe07a9b2e6c037058e0ba7b4a7600a60b08d8 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -144,8 +144,6 @@
 #define GEN6_STOLEN_RESERVED_ENABLE    (1 << 0)
 #define GEN11_STOLEN_RESERVED_ADDR_MASK        (0xFFFFFFFFFFFULL << 20)
 
-#define _VGA_MSR_WRITE _MMIO(0x3c2)
-
 #define _GEN7_PIPEA_DE_LOAD_SL 0x70068
 #define _GEN7_PIPEB_DE_LOAD_SL 0x71068
 #define GEN7_PIPE_DE_LOAD_SL(pipe) _MMIO_PIPE(pipe, _GEN7_PIPEA_DE_LOAD_SL, _GEN7_PIPEB_DE_LOAD_SL)