PR target/97727 aarch64: [testcase] fix bf16_vstN_lane_2.c for big endian targets

gcc/testsuite/ChangeLog

2020-11-09  Andrea Corallo  <andrea.corallo@arm.com>

	PR target/97727
	* gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c: Relax
	regexps.

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c
index f70c34dbd833f01c36d1404887683730ed1f6643..822968df44fe8cb4451a6613c8bc2af1abc66bcf 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c
@@ -11,15 +11,13 @@ test_vst2_lane_bf16 (bfloat16_t *ptr, bfloat16x4x2_t b)
   vst2_lane_bf16 (ptr, b, 2);
 }
 
-/* { dg-final { scan-assembler-times "st2\\t{v2.h - v3.h}\\\[2\\\], \\\[x0\\\]" 1 } } */
-
 void
 test_vst2q_lane_bf16 (bfloat16_t *ptr, bfloat16x8x2_t b)
 {
   vst2q_lane_bf16 (ptr, b, 2);
 }
 
-/* { dg-final { scan-assembler-times "st2\\t{v0.h - v1.h}\\\[2\\\], \\\[x0\\\]" 1 } } */
+/* { dg-final { scan-assembler-times "st2\\t{v\[0-9\]+.h - v\[0-9\]+.h}\\\[2\\\], \\\[x\[0-9\]+\\\]" 2 } } */
 
 void
 test_vst3_lane_bf16 (bfloat16_t *ptr, bfloat16x4x3_t b)
@@ -33,7 +31,7 @@ test_vst3q_lane_bf16 (bfloat16_t *ptr, bfloat16x8x3_t b)
   vst3q_lane_bf16 (ptr, b, 2);
 }
 
-/* { dg-final { scan-assembler-times "st3\\t{v4.h - v6.h}\\\[2\\\], \\\[x0\\\]" 2 } } */
+/* { dg-final { scan-assembler-times "st3\\t{v\[0-9\]+.h - v\[0-9\]+.h}\\\[2\\\], \\\[x\[0-9\]+\\\]" 2 } } */
 
 void
 test_vst4_lane_bf16 (bfloat16_t *ptr, bfloat16x4x4_t b)
@@ -41,12 +39,10 @@ test_vst4_lane_bf16 (bfloat16_t *ptr, bfloat16x4x4_t b)
   vst4_lane_bf16 (ptr, b, 2);
 }
 
-/* { dg-final { scan-assembler-times "st4\\t{v4.h - v7.h}\\\[2\\\], \\\[x0\\\]" 1 } } */
-
 void
 test_vst4q_lane_bf16 (bfloat16_t *ptr, bfloat16x8x4_t b)
 {
   vst4q_lane_bf16 (ptr, b, 2);
 }
 
-/* { dg-final { scan-assembler-times "st4\\t{v0.h - v3.h}\\\[2\\\], \\\[x0\\\]" 1 } } */
+/* { dg-final { scan-assembler-times "st4\\t{v\[0-9\]+.h - v\[0-9\]+.h}\\\[2\\\], \\\[x\[0-9\]+\\\]" 2 } } */