]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
realtek: 6.12: drop validate from phylink_mac_ops
authorMarkus Stockhausen <markus.stockhausen@gmx.de>
Tue, 27 May 2025 19:21:39 +0000 (15:21 -0400)
committerRobert Marko <robimarko@gmail.com>
Wed, 11 Jun 2025 20:27:22 +0000 (22:27 +0200)
The validate function no longer exists in phylink_mac_ops. Remove
it for the internal ethernet interface. Instead provide some
meaningful mac capabilities.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c

index 5f020979c77140dbac6dddc947834545d321b2bb..460038db0f3c82de618ab8fb8f0c93f991c8d7f4 100644 (file)
@@ -1377,55 +1377,6 @@ static int rtl838x_poll_rx(struct napi_struct *napi, int budget)
        return work_done;
 }
 
-
-static void rtl838x_validate(struct phylink_config *config,
-                        unsigned long *supported,
-                        struct phylink_link_state *state)
-{
-       __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
-
-       pr_debug("In %s\n", __func__);
-
-       if (!phy_interface_mode_is_rgmii(state->interface) &&
-           state->interface != PHY_INTERFACE_MODE_1000BASEX &&
-           state->interface != PHY_INTERFACE_MODE_MII &&
-           state->interface != PHY_INTERFACE_MODE_REVMII &&
-           state->interface != PHY_INTERFACE_MODE_GMII &&
-           state->interface != PHY_INTERFACE_MODE_QSGMII &&
-           state->interface != PHY_INTERFACE_MODE_INTERNAL &&
-           state->interface != PHY_INTERFACE_MODE_SGMII) {
-               bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
-               pr_err("Unsupported interface: %d\n", state->interface);
-               return;
-       }
-
-       /* Allow all the expected bits */
-       phylink_set(mask, Autoneg);
-       phylink_set_port_modes(mask);
-       phylink_set(mask, Pause);
-       phylink_set(mask, Asym_Pause);
-
-       /* With the exclusion of MII and Reverse MII, we support Gigabit,
-        * including Half duplex
-        */
-       if (state->interface != PHY_INTERFACE_MODE_MII &&
-           state->interface != PHY_INTERFACE_MODE_REVMII) {
-               phylink_set(mask, 1000baseT_Full);
-               phylink_set(mask, 1000baseT_Half);
-       }
-
-       phylink_set(mask, 10baseT_Half);
-       phylink_set(mask, 10baseT_Full);
-       phylink_set(mask, 100baseT_Half);
-       phylink_set(mask, 100baseT_Full);
-
-       bitmap_and(supported, supported, mask,
-                  __ETHTOOL_LINK_MODE_MASK_NBITS);
-       bitmap_and(state->advertising, state->advertising, mask,
-                  __ETHTOOL_LINK_MODE_MASK_NBITS);
-}
-
-
 static void rtl838x_mac_config(struct phylink_config *config,
                               unsigned int mode,
                               const struct phylink_link_state *state)
@@ -2485,7 +2436,6 @@ static const struct phylink_pcs_ops rtl838x_pcs_ops = {
 };
 
 static const struct phylink_mac_ops rtl838x_phylink_ops = {
-       .validate = rtl838x_validate,
        .mac_select_pcs = rtl838x_mac_select_pcs,
        .mac_config = rtl838x_mac_config,
        .mac_link_down = rtl838x_mac_link_down,
@@ -2681,6 +2631,9 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev)
        priv->pcs.ops = &rtl838x_pcs_ops;
        priv->phylink_config.dev = &dev->dev;
        priv->phylink_config.type = PHYLINK_NETDEV;
+       priv->phylink_config.mac_capabilities =
+               MAC_10 | MAC_100 | MAC_1000FD | MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
+
        __set_bit(PHY_INTERFACE_MODE_INTERNAL, priv->phylink_config.supported_interfaces);
 
        phylink = phylink_create(&priv->phylink_config, pdev->dev.fwnode,