--- /dev/null
+From mail@maciej.szmigiero.name Fri Jan 26 17:16:00 2024
+From: "Maciej S. Szmigiero" <mail@maciej.szmigiero.name>
+Date: Thu, 25 Jan 2024 19:06:54 +0100
+Subject: x86/CPU/AMD: Fix disabling XSAVES on AMD family 0x17 due to erratum
+To: stable@vger.kernel.org
+Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Andrew Cooper <andrew.cooper3@citrix.com>, Borislav Petkov <bp@alien8.de>
+Message-ID: <d4d6dd5ccb846f128740685ecaeed4f0e9ad13fe.1706205932.git.maciej.szmigiero@oracle.com>
+
+
+From: "Maciej S. Szmigiero" <maciej.szmigiero@oracle.com>
+
+The stable kernel version backport of the patch disabling XSAVES on AMD
+Zen family 0x17 applied this change to the wrong function (init_amd_k6()),
+one which isn't called for Zen CPUs.
+
+Move the erratum to the init_amd_zn() function instead.
+
+Add an explicit family 0x17 check to the erratum so nothing will break if
+someone naively makes this kernel version call init_amd_zn() also for
+family 0x19 in the future (as the current upstream code does).
+
+Fixes: f028a7db9824 ("x86/CPU/AMD: Disable XSAVES on AMD family 0x17")
+Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/cpu/amd.c | 20 +++++++++++---------
+ 1 file changed, 11 insertions(+), 9 deletions(-)
+
+--- a/arch/x86/kernel/cpu/amd.c
++++ b/arch/x86/kernel/cpu/amd.c
+@@ -271,15 +271,6 @@ static void init_amd_k6(struct cpuinfo_x
+ return;
+ }
+ #endif
+- /*
+- * Work around Erratum 1386. The XSAVES instruction malfunctions in
+- * certain circumstances on Zen1/2 uarch, and not all parts have had
+- * updated microcode at the time of writing (March 2023).
+- *
+- * Affected parts all have no supervisor XSAVE states, meaning that
+- * the XSAVEC instruction (which works fine) is equivalent.
+- */
+- clear_cpu_cap(c, X86_FEATURE_XSAVES);
+ }
+
+ static void init_amd_k7(struct cpuinfo_x86 *c)
+@@ -979,6 +970,17 @@ static void init_amd_zn(struct cpuinfo_x
+ if (c->x86 == 0x19 && !cpu_has(c, X86_FEATURE_BTC_NO))
+ set_cpu_cap(c, X86_FEATURE_BTC_NO);
+ }
++
++ /*
++ * Work around Erratum 1386. The XSAVES instruction malfunctions in
++ * certain circumstances on Zen1/2 uarch, and not all parts have had
++ * updated microcode at the time of writing (March 2023).
++ *
++ * Affected parts all have no supervisor XSAVE states, meaning that
++ * the XSAVEC instruction (which works fine) is equivalent.
++ */
++ if (c->x86 == 0x17)
++ clear_cpu_cap(c, X86_FEATURE_XSAVES);
+ }
+
+ static bool cpu_has_zenbleed_microcode(void)