riscv: dts: microchip: fix pic64gx gpio interrupt-cells

As the pic64gx devicetree files got added in parallel to the
GPIO interrupt-cells being fixed for PolarFire SoC, they didn't get
changed to the correct values. Fix them now.

Fixes: 7219d20f9f421 ("riscv: dts: microchip: add pic64gx and its curiosity kit")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/microchip/pic64gx.dtsi b/arch/riscv/boot/dts/microchip/pic64gx.dtsi
index 5cf3e3de0e0673cfbd31ef45a2d7f301d93bb809..5addfd4357117a7f871365689b43be2fe62cbe15 100644 (file)
--- a/arch/riscv/boot/dts/microchip/pic64gx.dtsi
+++ b/arch/riscv/boot/dts/microchip/pic64gx.dtsi
@@ -494,7 +494,7 @@
                        reg = <0x0 0x20120000 0x0 0x1000>;
                        interrupt-parent = <&irqmux>;
                        interrupt-controller;
-                       #interrupt-cells = <1>;
+                       #interrupt-cells = <2>;
                        interrupts = <0>, <1>, <2>, <3>,
                                     <4>, <5>, <6>, <7>,
                                     <8>, <9>, <10>, <11>,
@@ -511,7 +511,7 @@
                        reg = <0x0 0x20121000 0x0 0x1000>;
                        interrupt-parent = <&irqmux>;
                        interrupt-controller;
-                       #interrupt-cells = <1>;
+                       #interrupt-cells = <2>;
                        interrupts = <32>, <33>, <34>, <35>,
                                     <36>, <37>, <38>, <39>,
                                     <40>, <41>, <42>, <43>,
@@ -530,7 +530,7 @@
                        reg = <0x0 0x20122000 0x0 0x1000>;
                        interrupt-parent = <&irqmux>;
                        interrupt-controller;
-                       #interrupt-cells = <1>;
+                       #interrupt-cells = <2>;
                        interrupts = <64>, <65>, <66>, <67>,
                                     <68>, <69>, <70>, <71>,
                                     <72>, <73>, <74>, <75>,