]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: sm8550: set CPU interconnect paths as ACTIVE_ONLY
authorNeil Armstrong <neil.armstrong@linaro.org>
Wed, 15 Jan 2025 13:43:54 +0000 (14:43 +0100)
committerBjorn Andersson <andersson@kernel.org>
Wed, 26 Feb 2025 03:54:23 +0000 (21:54 -0600)
In all interconnect paths involving the cpu (MASTER_APPSS_PROC), use
the QCOM_ICC_TAG_ACTIVE_ONLY which will only retain the vote if
the CPU is online, leaving the firmware disabling the path when the
CPUs goes in suspend-idle.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250115-topic-sm8x50-upstream-dt-icc-update-v1-2-eaa8b10e2af7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm8550.dtsi

index cc754684bf05b99d39e3987312a200b479e8de2c..a04a405a3f78f34fddf14a26a6996148cf60c85f 100644 (file)
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi8_data_clk>, <&qup_spi8_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi11_data_clk>, <&qup_spi11_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi12_data_clk>, <&qup_spi12_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi13_data_clk>, <&qup_spi13_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi15_data_clk>, <&qup_spi15_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt  SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_I2C QCOM_ICC_TAG_ACTIVE_ONLY>;
                                interconnect-names = "qup-core", "qup-config";
                                status = "disabled";
                        };
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi0_data_clk>, <&qup_spi0_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi1_data_clk>, <&qup_spi1_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi2_data_clk>, <&qup_spi2_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi3_data_clk>, <&qup_spi3_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                #size-cells = <0>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi4_data_clk>, <&qup_spi4_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi5_data_clk>, <&qup_spi5_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                pinctrl-0 = <&qup_spi6_data_clk>, <&qup_spi6_cs>;
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>,
                                                <&aggre1_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
                                                 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
                                interconnect-names = "qup-core", "qup-config", "qup-memory";
                                interconnect-names = "qup-core", "qup-config";
                                interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
                                                 &clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
-                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>;
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                                &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ACTIVE_ONLY>;
                                status = "disabled";
                        };
                };
 
                        interconnects = <&pcie_noc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS
                                         &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
-                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                        &cnoc_main SLAVE_PCIE_0 QCOM_ICC_TAG_ALWAYS>;
+                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &cnoc_main SLAVE_PCIE_0 QCOM_ICC_TAG_ACTIVE_ONLY>;
                        interconnect-names = "pcie-mem", "cpu-pcie";
 
                        msi-map = <0x0 &gic_its 0x1400 0x1>,
 
                        interconnects = <&pcie_noc MASTER_PCIE_1 QCOM_ICC_TAG_ALWAYS
                                         &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
-                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                        &cnoc_main SLAVE_PCIE_1 QCOM_ICC_TAG_ALWAYS>;
+                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &cnoc_main SLAVE_PCIE_1 QCOM_ICC_TAG_ACTIVE_ONLY>;
                        interconnect-names = "pcie-mem", "cpu-pcie";
 
                        msi-map = <0x0 &gic_its 0x1480 0x1>,
                        operating-points-v2 = <&ufs_opp_table>;
                        interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS
                                         &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
-                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                        &config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ALWAYS>;
+                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
 
                        interconnect-names = "ufs-ddr", "cpu-ufs";
                        clock-names = "core_clk",
 
                        interconnects = <&aggre2_noc MASTER_IPA QCOM_ICC_TAG_ALWAYS
                                         &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
-                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                        &config_noc SLAVE_IPA_CFG QCOM_ICC_TAG_ALWAYS>;
+                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &config_noc SLAVE_IPA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
                        interconnect-names = "memory",
                                             "config";
 
 
                        interconnects = <&aggre2_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS
                                         &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
-                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                        &config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ALWAYS>;
+                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY>;
                        interconnect-names = "sdhc-ddr", "cpu-sdhc";
                        bus-width = <4>;
                        dma-coherent;
 
                        interconnects = <&aggre1_noc MASTER_USB3_0 QCOM_ICC_TAG_ALWAYS
                                         &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
-                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
-                                        &config_noc SLAVE_USB3_0 QCOM_ICC_TAG_ALWAYS>;
+                                       <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+                                        &config_noc SLAVE_USB3_0 QCOM_ICC_TAG_ACTIVE_ONLY>;
                        interconnect-names = "usb-ddr", "apps-usb";
 
                        status = "disabled";