- Update subtarget configs for kernel 6.12.
- Refresh patches for kernel 6.12.
- Drop 210-revert-macronix-nand-block-protection.patch since brcmnand no longer
implements low level ops.
- Adapt bcm63268 gpio switches for 6.12 numbering.
- Add b53 pending patches from Jonas Gorski to fix system hangs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_CPUFREQ=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CRASH_CORE=y
-CONFIG_CRASH_DUMP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_ZSTD=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
+CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
# CONFIG_DT_BCM93384WVG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
-CONFIG_KEXEC_CORE=y
# CONFIG_LEDS_SERCOMM_MSP430 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
-CONFIG_PHYSICAL_START=0x80010000
CONFIG_PHY_BCM63XX_USBH=y
# CONFIG_PHY_BRCM_SATA is not set
CONFIG_PINCTRL=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
-CONFIG_PREEMPT_NONE_BUILD=y
-CONFIG_PROC_VMCORE=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
-CONFIG_SOC_BCM63XX=y
CONFIG_SPI=y
# CONFIG_SPI_BCM63XX is not set
CONFIG_SPI_BCM63XX_HSSPI=y
. /lib/functions/uci-defaults.sh
+KERNEL_MAJOR=$(uname -r | awk -F '.' '{print $1}')
+KERNEL_MINOR=$(uname -r | awk -F '.' '{print $2}')
+
board_config_update
+if [ "${KERNEL_MAJOR}" -ge "6" ] && [ "${KERNEL_MINOR}" -ge "12" ]; then
+ GPIO_BASE=512
+else
+ GPIO_BASE=460
+fi
+
case "$(board_name)" in
sercomm,h500-s-lowi |\
sercomm,h500-s-vfes)
- ucidef_add_gpio_switch "qtn_power" "Quantenna Module Power" "480" "1"
+ ucidef_add_gpio_switch "qtn_power" "Quantenna Module Power" "$(($GPIO_BASE + 20))" "1"
;;
esac
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_CPUFREQ=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CRASH_CORE=y
-CONFIG_CRASH_DUMP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
+CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
# CONFIG_DT_BCM93384WVG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
-CONFIG_KEXEC_CORE=y
# CONFIG_LEDS_SERCOMM_MSP430 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
-CONFIG_PHYSICAL_START=0x80010000
CONFIG_PHY_BCM63XX_USBH=y
# CONFIG_PHY_BRCM_SATA is not set
CONFIG_PINCTRL=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
-CONFIG_PREEMPT_NONE_BUILD=y
-CONFIG_PROC_VMCORE=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
-CONFIG_SOC_BCM63XX=y
CONFIG_SPI=y
CONFIG_SPI_BCM63XX=y
CONFIG_SPI_BCM63XX_HSSPI=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_CPUFREQ=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CRASH_CORE=y
-CONFIG_CRASH_DUMP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
+CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
# CONFIG_DT_BCM93384WVG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
-CONFIG_KEXEC_CORE=y
# CONFIG_LEDS_SERCOMM_MSP430 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
-CONFIG_PHYSICAL_START=0x80010000
CONFIG_PHY_BCM63XX_USBH=y
# CONFIG_PHY_BRCM_SATA is not set
CONFIG_PINCTRL=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
-CONFIG_PREEMPT_NONE_BUILD=y
-CONFIG_PROC_VMCORE=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
-CONFIG_SOC_BCM63XX=y
CONFIG_SPI=y
# CONFIG_SPI_BCM63XX is not set
CONFIG_SPI_BCM63XX_HSSPI=y
CONFIG_BCM6345_L1_IRQ=y
CONFIG_BCM6348_ENET=y
# CONFIG_BCM6368_ENETSW is not set
+# CONFIG_BCM63XX_POWER is not set
CONFIG_BCM7038_WDT=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_CPUFREQ=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CRASH_CORE=y
-CONFIG_CRASH_DUMP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_ZSTD=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
+CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
# CONFIG_DT_BCM93384WVG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
-CONFIG_KEXEC_CORE=y
# CONFIG_LEDS_SERCOMM_MSP430 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
-CONFIG_PHYSICAL_START=0x80010000
CONFIG_PHY_BCM63XX_USBH=y
# CONFIG_PHY_BRCM_SATA is not set
CONFIG_PINCTRL=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
-CONFIG_PREEMPT_NONE_BUILD=y
-CONFIG_PROC_VMCORE=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
-# CONFIG_SOC_BCM63XX is not set
CONFIG_SPI=y
CONFIG_SPI_BCM63XX=y
CONFIG_SPI_MASTER=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_CPUFREQ=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CRASH_CORE=y
-CONFIG_CRASH_DUMP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
+CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
# CONFIG_DT_BCM93384WVG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
-CONFIG_KEXEC_CORE=y
# CONFIG_LEDS_SERCOMM_MSP430 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
-CONFIG_PHYSICAL_START=0x80010000
CONFIG_PHY_BCM63XX_USBH=y
# CONFIG_PHY_BRCM_SATA is not set
CONFIG_PINCTRL=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
-CONFIG_PREEMPT_NONE_BUILD=y
-CONFIG_PROC_VMCORE=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
-CONFIG_SOC_BCM63XX=y
CONFIG_SPI=y
CONFIG_SPI_BCM63XX=y
CONFIG_SPI_BCM63XX_HSSPI=y
CONFIG_BCM6345_L1_IRQ=y
# CONFIG_BCM6348_ENET is not set
CONFIG_BCM6368_ENETSW=y
+# CONFIG_BCM63XX_POWER is not set
CONFIG_BCM7038_WDT=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_CPUFREQ=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CRASH_CORE=y
-CONFIG_CRASH_DUMP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
+CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
# CONFIG_DT_BCM93384WVG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
-CONFIG_KEXEC_CORE=y
# CONFIG_LEDS_SERCOMM_MSP430 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
-CONFIG_PHYSICAL_START=0x80010000
CONFIG_PHY_BCM63XX_USBH=y
# CONFIG_PHY_BRCM_SATA is not set
CONFIG_PINCTRL=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
-CONFIG_PREEMPT_NONE_BUILD=y
-CONFIG_PROC_VMCORE=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
-# CONFIG_SOC_BCM63XX is not set
CONFIG_SPI=y
CONFIG_SPI_BCM63XX=y
CONFIG_SPI_MASTER=y
+};
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
-@@ -111,6 +111,10 @@ config I8259
+@@ -109,6 +109,10 @@ config I8259
bool
select IRQ_DOMAIN
--- /dev/null
+From 2ba8f6d6759ec0bb1eaf3840eb2201a5d4931126 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 19 May 2025 19:45:48 +0200
+Subject: [PATCH] net: dsa: b53: do not enable EEE on bcm63xx
+
+BCM63xx internal switches do not support EEE, but provide multiple RGMII
+ports where external PHYs may be connected. If one of these PHYs are EEE
+capable, we may try to enable EEE for the MACs, which then hangs the
+system on access of the (non-existent) EEE registers.
+
+Fix this by checking if the switch actually supports EEE before
+attempting to configure it.
+
+Fixes: 22256b0afb12 ("net: dsa: b53: Move EEE functions to b53")
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
+---
+ drivers/net/dsa/b53/b53_common.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/dsa/b53/b53_common.c
++++ b/drivers/net/dsa/b53/b53_common.c
+@@ -2353,6 +2353,9 @@ int b53_eee_init(struct dsa_switch *ds,
+ {
+ int ret;
+
++ if (!b53_support_eee(ds, port))
++ return 0;
++
+ ret = phy_init_eee(phy, false);
+ if (ret)
+ return 0;
+@@ -2367,7 +2370,7 @@ bool b53_support_eee(struct dsa_switch *
+ {
+ struct b53_device *dev = ds->priv;
+
+- return !is5325(dev) && !is5365(dev);
++ return !is5325(dev) && !is5365(dev) && !is63xx(dev);
+ }
+ EXPORT_SYMBOL(b53_support_eee);
+
--- /dev/null
+From b1308c8642f6a75b4494370784fba86dd2f0b0e0 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 19 May 2025 19:45:50 +0200
+Subject: [PATCH] net: dsa: b53: allow RGMII for bcm63xx RGMII ports
+
+Add RGMII to supported interfaces for BCM63xx RGMII ports so they can be
+actually used in RGMII mode.
+
+Without this, phylink will fail to configure them:
+
+[ 3.580000] b53-switch 10700000.switch GbE3 (uninitialized): validation of rgmii with support 0000000,00000000,00000000,000062ff and advertisement 0000000,00000000,00000000,000062ff failed: -EINVAL
+[ 3.600000] b53-switch 10700000.switch GbE3 (uninitialized): failed to connect to PHY: -EINVAL
+[ 3.610000] b53-switch 10700000.switch GbE3 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 4
+
+Fixes: ce3bf94871f7 ("net: dsa: b53: add support for BCM63xx RGMIIs")
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
+---
+ drivers/net/dsa/b53/b53_common.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/dsa/b53/b53_common.c
++++ b/drivers/net/dsa/b53/b53_common.c
+@@ -1462,6 +1462,10 @@ static void b53_phylink_get_caps(struct
+ __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces);
+ __set_bit(PHY_INTERFACE_MODE_REVMII, config->supported_interfaces);
+
++ /* BCM63xx RGMII ports support RGMII */
++ if (is63xx(dev) && port >= B53_63XX_RGMII0)
++ phy_interface_set_rgmii(config->supported_interfaces);
++
+ config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
+ MAC_10 | MAC_100;
+
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -272,19 +272,13 @@ config BMIPS_GENERIC
+@@ -259,19 +259,13 @@ config BMIPS_GENERIC
select SYNC_R4K
select COMMON_CLK
select BCM6345_L1_IRQ
select SWAP_IO_SPACE
select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
-@@ -294,6 +288,7 @@ config BMIPS_GENERIC
+@@ -281,6 +275,7 @@ config BMIPS_GENERIC
select HAVE_PCI
select PCI_DRIVERS_GENERIC
select FW_CFE
BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
-@@ -124,7 +124,6 @@ config BCM6345_L1_IRQ
+@@ -122,7 +122,6 @@ config BCM6345_L1_IRQ
config BCM7038_L1_IRQ
tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
depends on ARCH_BRCMSTB || BMIPS_GENERIC
select GENERIC_IRQ_CHIP
select IRQ_DOMAIN
select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
-@@ -132,14 +131,12 @@ config BCM7038_L1_IRQ
+@@ -130,14 +129,12 @@ config BCM7038_L1_IRQ
config BCM7120_L2_IRQ
tristate "Broadcom STB 7120-style L2 interrupt controller driver"
depends on ARCH_BRCMSTB || BMIPS_GENERIC
+++ /dev/null
-From 5a37811de679bff03e9c5a746f75574910ede964 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Wed, 22 Mar 2023 20:52:13 +0100
-Subject: [PATCH] Revert "mtd: rawnand: Macronix: Add support for block
- protection"
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This reverts commit 03a539c7a118427a6609a26461358c56ac8f3a06.
-
-Macronix block protection doesn't seem to be supported on Sercomm H-500s
-devices since it hangs the device.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
----
- drivers/mtd/nand/raw/nand_macronix.c | 72 ----------------------------
- 1 file changed, 72 deletions(-)
-
---- a/drivers/mtd/nand/raw/nand_macronix.c
-+++ b/drivers/mtd/nand/raw/nand_macronix.c
-@@ -13,10 +13,6 @@
- #define MACRONIX_READ_RETRY_BIT BIT(0)
- #define MACRONIX_NUM_READ_RETRY_MODES 6
-
--#define ONFI_FEATURE_ADDR_MXIC_PROTECTION 0xA0
--#define MXIC_BLOCK_PROTECTION_ALL_LOCK 0x38
--#define MXIC_BLOCK_PROTECTION_ALL_UNLOCK 0x0
--
- #define ONFI_FEATURE_ADDR_MXIC_RANDOMIZER 0xB0
- #define MACRONIX_RANDOMIZER_BIT BIT(1)
- #define MACRONIX_RANDOMIZER_ENPGM BIT(0)
-@@ -189,73 +185,6 @@ static void macronix_nand_fix_broken_get
- ONFI_FEATURE_ADDR_TIMING_MODE, 1);
- }
-
--/*
-- * Macronix NAND supports Block Protection by Protectoin(PT) pin;
-- * active high at power-on which protects the entire chip even the #WP is
-- * disabled. Lock/unlock protection area can be partition according to
-- * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on.
-- */
--static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len)
--{
-- u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
-- int ret;
--
-- feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK;
-- nand_select_target(chip, 0);
-- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
-- feature);
-- nand_deselect_target(chip);
-- if (ret)
-- pr_err("%s all blocks failed\n", __func__);
--
-- return ret;
--}
--
--static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len)
--{
-- u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
-- int ret;
--
-- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
-- nand_select_target(chip, 0);
-- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
-- feature);
-- nand_deselect_target(chip);
-- if (ret)
-- pr_err("%s all blocks failed\n", __func__);
--
-- return ret;
--}
--
--static void macronix_nand_block_protection_support(struct nand_chip *chip)
--{
-- u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
-- int ret;
--
-- bitmap_set(chip->parameters.get_feature_list,
-- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
--
-- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
-- nand_select_target(chip, 0);
-- ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
-- feature);
-- nand_deselect_target(chip);
-- if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) {
-- if (ret)
-- pr_err("Block protection check failed\n");
--
-- bitmap_clear(chip->parameters.get_feature_list,
-- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
-- return;
-- }
--
-- bitmap_set(chip->parameters.set_feature_list,
-- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
--
-- chip->ops.lock_area = mxic_nand_lock;
-- chip->ops.unlock_area = mxic_nand_unlock;
--}
--
- static int nand_power_down_op(struct nand_chip *chip)
- {
- int ret;
-@@ -488,7 +417,6 @@ static int macronix_nand_init(struct nan
-
- macronix_nand_fix_broken_get_timings(chip);
- macronix_nand_onfi_init(chip);
-- macronix_nand_block_protection_support(chip);
- macronix_nand_deep_power_down_support(chip);
- macronix_nand_setup_otp(chip);
-
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -286,7 +286,6 @@ config BMIPS_GENERIC
+@@ -273,7 +273,6 @@ config BMIPS_GENERIC
select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
select HARDIRQS_SW_RESEND
select HAVE_PCI
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
-@@ -299,6 +299,15 @@ config LEDS_COBALT_RAQ
+@@ -328,6 +328,15 @@ config LEDS_COBALT_RAQ
help
This option enables support for the Cobalt Raq series LEDs.
+ depends on SPI
+ depends on OF
+ help
-+ This option enables support for the Sercomm MSP430G2513 SPI LED
++ This option enables support for the Sercomm MSP430G2513 SPI LED
+ controllers.
+
- config LEDS_SUNFIRE
- tristate "LED support for SunFire servers."
- depends on LEDS_CLASS
+ config LEDS_SUN50I_A100
+ tristate "LED support for Allwinner A100 RGB LED controller"
+ depends on LEDS_CLASS_MULTICOLOR
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
-@@ -78,6 +78,7 @@ obj-$(CONFIG_LEDS_POWERNV) += leds-powe
+@@ -81,6 +81,7 @@ obj-$(CONFIG_LEDS_POWERNV) += leds-powe
obj-$(CONFIG_LEDS_PWM) += leds-pwm.o
obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o
obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o
+obj-$(CONFIG_LEDS_SERCOMM_MSP430) += leds-sercomm-msp430.o
+ obj-$(CONFIG_LEDS_SUN50I_A100) += leds-sun50i-a100.o
obj-$(CONFIG_LEDS_ST1202) += leds-st1202.o
obj-$(CONFIG_LEDS_SUNFIRE) += leds-sunfire.o
- obj-$(CONFIG_LEDS_SYSCON) += leds-syscon.o
projects / thirdparty / openwrt.git / commitdiff
