arm: improve tests for vmulq*

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/vmulq_f16.c: Improve test.
	* gcc.target/arm/mve/intrinsics/vmulq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_m_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vmulq_x_u8.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
index 68fb012ad34665da1583cbf25b07e4cf779e5fdb..9251809bfa18b0e8474b4659dff46200c9bc72ee 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.f16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float16x8_t
 foo (float16x8_t a, float16x8_t b)
 {
   return vmulq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.f16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.f16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float16x8_t
 foo1 (float16x8_t a, float16x8_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
index 512661aeec778c9cd3b6c1ae666e2137b9d99ff0..3dacb7ad77ca53f120bd1f5c90a8b882fd18e84f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_f32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.f32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float32x4_t
 foo (float32x4_t a, float32x4_t b)
 {
   return vmulq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.f32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.f32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float32x4_t
 foo1 (float32x4_t a, float32x4_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
index d05d48f6261949e716e4b156f95eef7228f0477f..8f47e96263325efe885ffd3c5dd04a01cda0a383 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float16x8_t
 foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vmulq_m_f16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float16x8_t
 foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
index 8c2ec81da3be7698ea0d41f06e75c02a7092c0e5..41f3786e5fef34202a83c2d701ce4b2f3e715d06 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float32x4_t
 foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vmulq_m_f32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float32x4_t
 foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
index 1f1d408d5b9089f11ce94ab921f4d0bb22e264bd..2f4fecbf56b5a1d76b4ac3acca189926a2cde65b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float16x8_t
 foo (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vmulq_m_n_f16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float16x8_t
 foo1 (float16x8_t inactive, float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f16"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+float16x8_t
+foo2 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
+{
+  return vmulq_m (inactive, a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
index 4aae0849e2b39d86be0e371a9887e54c517e108d..2ad4108d637a7995d9e4633e863277296e685792 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float32x4_t
 foo (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vmulq_m_n_f32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float32x4_t
 foo1 (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f32"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+float32x4_t
+foo2 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
+{
+  return vmulq_m (inactive, a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
index 9a87f7d36434ab3b65d0bfd8e7e12aa58a525b24..b10bd5af6877287d0cc7be0a94968fac82b2b94d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vmulq_m_n_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
index da7d38b99687c6f42042b402cf961506b20863ef..e8bdf7278ad27a8431577058c195a095a33d5d74 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vmulq_m_n_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
index 227b3a50a9221643a424dbd344e1ea94d4232b8a..001e888e075cfc0a980f88bfc2679e3123b0972b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vmulq_m_n_s8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
index e09334df1de907ef09a0469696484783921f640b..5015f20a4be0cd464b7f22f414d1985d053763f5 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vmulq_m_n_u16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t inactive, uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint16x8_t
+foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
+{
+  return vmulq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
index 62d6c262e5a2ebf1866319b491af81357348c5a0..a6013a427213faf663049d75227780519925c290 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vmulq_m_n_u32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t inactive, uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint32x4_t
+foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
+{
+  return vmulq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
index e7993ab3c3129544273ad4f012310dda5551ca51..42fc7264229bba5b16795204f769fd8dbaf44f4d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vmulq_m_n_u8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t inactive, uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint8x16_t
+foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
+{
+  return vmulq_m (inactive, a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
index 61cdf656c19101f53b3f74b2b7d6e89c621e89e1..04fdc010f5b62236a1245a258d416b98ac985485 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vmulq_m_s16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
index 622407b96da056b13bd5dd68dd32e7e46141f7b5..96178d02e378119919d3d1d65825730fe6d1624c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vmulq_m_s32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
index bb2943cc72763f8877b3988067777d387a989fa6..aa3b8061122285a405bdd5b7992f06e6f4652afe 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_s8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vmulq_m_s8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
index a0680174753641b0e056a3ba2f17160e4b393b25..e56ab77f3ee2d3144c2573a15bae23ef8ce3428e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vmulq_m_u16 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
index 586a32560d7c1e3a2d3e6144f94b21929c91d8b7..72e313cfd78df6e37dcc1c3a03248638141000aa 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vmulq_m_u32 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
index 0a8e49a5982fffdf07ab1b97b71e358620160056..1ae6a93934c397d588987aa609748741591aae1e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_u8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vmulq_m_u8 (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vmulq_m (inactive, a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
index a3f693f06f70669e70345e6a0b34558e7860942a..d77aeb219ca4151e10877594250d5991fa82c391 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f16.c
@@ -1,21 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.f16        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float16x8_t
 foo (float16x8_t a, float16_t b)
 {
   return vmulq_n_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.f16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.f16        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float16x8_t
 foo1 (float16x8_t a, float16_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.f16"  }  } */
+/*
+**foo2:
+**     ...
+**     vmul.f16        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+float16x8_t
+foo2 (float16x8_t a)
+{
+  return vmulq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
index 5d1cfa368a7f7d9c72888f1a7cee67ae0364d8d8..9ef6a21b2bde949be7fa15ce82b64d41bb6842f3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_f32.c
@@ -1,21 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.f32        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float32x4_t
 foo (float32x4_t a, float32_t b)
 {
   return vmulq_n_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.f32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.f32        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float32x4_t
 foo1 (float32x4_t a, float32_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.f32"  }  } */
+/*
+**foo2:
+**     ...
+**     vmul.f32        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+float32x4_t
+foo2 (float32x4_t a)
+{
+  return vmulq (a, 1.1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
index 98e84cbf202d9039a9316b487762332c0e6d3af0..7ea25dce4a7ca3a19341c2fd304bceae22fb49f7 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i16        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a, int16_t b)
 {
   return vmulq_n_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i16        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a, int16_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
index adbfd6fe10bdfeccb48f9f1b738f3f7ff1ce64a0..b884603ac5b7d3809dc8fdce19120cb624f1a9db 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i32        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a, int32_t b)
 {
   return vmulq_n_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i32        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a, int32_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
index c845f108f88777fc3d753a411151e56cd9de8b1c..8e6e17cd59374db969adba98ef93ca8755c11d9b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_s8.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a, int8_t b)
 {
   return vmulq_n_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a, int8_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
index e52acdc53b9942d925413cb63d61c270a740cd5b..907bb0a4009d781f7b975b2a700119d5132b31ed 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u16.c
@@ -1,21 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i16        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t a, uint16_t b)
 {
   return vmulq_n_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i16        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t a, uint16_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i16"  }  } */
+/*
+**foo2:
+**     ...
+**     vmul.i16        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint16x8_t
+foo2 (uint16x8_t a)
+{
+  return vmulq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
index 9da4bc1f3590e576f7646e8aaa2530fa0c70f155..1164b29fc76b6ea75bd269e71e2999f3029fa00f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u32.c
@@ -1,21 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i32        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t a, uint32_t b)
 {
   return vmulq_n_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i32        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t a, uint32_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i32"  }  } */
+/*
+**foo2:
+**     ...
+**     vmul.i32        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint32x4_t
+foo2 (uint32x4_t a)
+{
+  return vmulq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
index e0f152db729bb02f08379bb88c9b027fd370d272..ccc950e3ccf2352815e141e7cb11e8fb635ab45e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_n_u8.c
@@ -1,21 +1,45 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t a, uint8_t b)
 {
   return vmulq_n_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t a, uint8_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i8"  }  } */
+/*
+**foo2:
+**     ...
+**     vmul.i8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint8x16_t
+foo2 (uint8x16_t a)
+{
+  return vmulq (a, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
index 89cc604fda00d0408b1c6cfba90314f55694afbb..a1fc1fc8f04b5083ca09087da4d85867e69184ce 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a, int16x8_t b)
 {
   return vmulq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a, int16x8_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
index f87fbf1249c1b8321c192e74cd0625fa5a4e8799..4fcf0dd88d19e673365c0bc08ea8ac173b71c2c4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a, int32x4_t b)
 {
   return vmulq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a, int32x4_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
index 4e40065ad22e12bf2a7097ff50f533f239212a17..d0c147ef9126e7cf4a389b26c2c8b8c52b8fb249 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_s8.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a, int8x16_t b)
 {
   return vmulq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a, int8x16_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
index ae95bf68afec3ba43cd86c7d7cd69684ce57367b..d4a24ba95b61c727517cc816c72c44f6f9b9461c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u16.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t a, uint16x8_t b)
 {
   return vmulq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i16        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t a, uint16x8_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
index 4f8e9762d5fb6e2c751bcd7daed7b98360fb1fa5..c9194b73eafdd7afc9ab5428e776a591033b5b63 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u32.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t a, uint32x4_t b)
 {
   return vmulq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i32        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t a, uint32x4_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
index a3776ff8314d584386a52499454f493add0139fa..d69402021ece775b03324dd1996f265faa67a650 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_u8.c
@@ -1,21 +1,33 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t a, uint8x16_t b)
 {
   return vmulq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmul.i8 q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t a, uint8x16_t b)
 {
   return vmulq (a, b);
 }
 
-/* { dg-final { scan-assembler "vmul.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
index 1f864cf481a139f5194c4a8f0be1d4f54f92bdba..169871b47d82fbf50808950920ef227aca2ec58b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float16x8_t
 foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vmulq_x_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float16x8_t
 foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
index 07cc3d0277cec4a372d3870310338feb37f396af..f800731b3ff889b65edbf5163d1344acc7d627a6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_f32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float32x4_t
 foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vmulq_x_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 float32x4_t
 foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
index 8fa6c759d54ba8db5ebff265fd00cf43c590d697..a4dc47725b5ef1b19c2670c16ac13d667df70694 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float16x8_t
 foo (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vmulq_x_n_f16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float16x8_t
 foo1 (float16x8_t a, float16_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f16"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+float16x8_t
+foo2 (float16x8_t a, mve_pred16_t p)
+{
+  return vmulq_x (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
index 654713c1348daf2caa5f3ab3750e4e258bd47caa..e8428fe9b2d5f129cbe3a3071f82311dc29aab73 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float32x4_t
 foo (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vmulq_x_n_f32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 float32x4_t
 foo1 (float32x4_t a, float32_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.f32"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.f32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+float32x4_t
+foo2 (float32x4_t a, mve_pred16_t p)
+{
+  return vmulq_x (a, 1.1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
index 4ec5ab397e1b80f1ac91ae171f2e9b513c84c734..27ef55d932a472ea759e7a659bc7b9d9e880e46e 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vmulq_x_n_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
index c52180067cf584109fe74a502bcec611eca3fa4f..929f420bd4c038030b426b2af980ee5c26411651 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vmulq_x_n_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
index a2a7c734de86cc3c6a431c02c249d70b3d375fd3..31885a2d90fa4ea8fcbe14649c60c21579f38d29 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vmulq_x_n_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
index 419a3cb6ea6c5e33b2f34c999407635a35f4d035..5972a525092b4119e0ef292c65157d85cb0c9bc6 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vmulq_x_n_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t a, uint16_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint16x8_t
+foo2 (uint16x8_t a, mve_pred16_t p)
+{
+  return vmulq_x (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
index 5acfcf6bf61b4bcd695ac99c2489a7b98152f2a5..3e02a542988807cdb6afa3a237859c00e1361473 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vmulq_x_n_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t a, uint32_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint32x4_t
+foo2 (uint32x4_t a, mve_pred16_t p)
+{
+  return vmulq_x (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
index 27e95ced0b5c3395e1127f8b913a0ccece55cf15..9b59b189a5feac87d602bba0190c8912f3cd1cf3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c
@@ -1,23 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vmulq_x_n_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t a, uint8_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?:  @.*|)
+**     ...
+*/
+uint8x16_t
+foo2 (uint8x16_t a, mve_pred16_t p)
+{
+  return vmulq_x (a, 1, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
index 5c232bfdc34c3d310aa7d58e51bb1a8c55ce4ac6..09b7169a68bfa4bdf595b97045f918b5e9aca37d 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vmulq_x_s16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int16x8_t
 foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
index 685fe45e4d01d98b63dec6b02fab73246dbd4c41..a57ef2da840adca49a54bf279ffb255c8d252275 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vmulq_x_s32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int32x4_t
 foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
index 19ecc6bcafc91291fadae1d38bc365a6334090ed..7fb5e0079902684b48254bd197ce0e7036acd042 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_s8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vmulq_x_s8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 int8x16_t
 foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
index 0700ca818ab58f23998be9ca5f0f18989bad5bd6..7b1c6b2acc86e5a94846459b2d3178f018669323 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u16.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vmulq_x_u16 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i16       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint16x8_t
 foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i16"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
index a1cb2aa221e55dd709da048b672d31bc87478ce9..bc53faff33f9b0fda4aa85881bbe697244d6e946 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u32.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vmulq_x_u32 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i32       q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint32x4_t
 foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
index 3b29852c83029e91d266f8cd5c6b34b68bd00da7..f43760861d4a0a22e0c862c0409b77c59ec98458 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_x_u8.c
@@ -1,23 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vmulq_x_u8 (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vmult.i8        q[0-9]+, q[0-9]+, q[0-9]+(?:    @.*|)
+**     ...
+*/
 uint8x16_t
 foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
 {
   return vmulq_x (a, b, p);
 }
 
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmult.i8"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file