realtek: dts: more ethernet-phy-package conversion

Encapsulate some more multiport PHYs into their packages.

Link: https://github.com/openwrt/openwrt/pull/24281
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>

diff --git a/target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts b/target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts
index 289dc73306ef36c09f4b30d02e6664b65b7674f9..1269cc34e4c01ae942879092bd986bcfb805e7b0 100644 (file)
--- a/target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts
+++ b/target/linux/realtek/dts/rtl8392_zyxel_gs1920-24hp-v1.dts
@@ -71,11 +71,16 @@
 };
 
 &mdio_bus1 {
-       /* External phy RTL8214FC #1 */
-       PHY_C22_SFP(48, 24, 0)
-       PHY_C22_SFP(49, 25, 1)
-       PHY_C22_SFP(50, 26, 2)
-       PHY_C22_SFP(51, 27, 3)
+       ethernet-phy-package@24 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <24>;
+
+               PHY_C22_SFP(48, 24, 0)
+               PHY_C22_SFP(49, 25, 1)
+               PHY_C22_SFP(50, 26, 2)
+               PHY_C22_SFP(51, 27, 3)
+       };
 };
 
 &pse {

diff --git a/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts b/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
index 0203b4ecc8b9d33266d4a0f2f9b9f2c8c6883d73..1ba0ac45736f4c95b4392be202acec6836b2e093 100644 (file)
--- a/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
+++ b/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
@@ -106,67 +106,93 @@
        // Switch doesn't come back properly after a reset so don't.
        // reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
 
-       /* External phy RTL8218B #1 */
-       PHY_C22(0, 0)
-       PHY_C22(1, 1)
-       PHY_C22(2, 2)
-       PHY_C22(3, 3)
-       PHY_C22(4, 4)
-       PHY_C22(5, 5)
-       PHY_C22(6, 6)
-       PHY_C22(7, 7)
-
-       /* External phy RTL8218B #2 */
-       PHY_C22(8, 8)
-       PHY_C22(9, 9)
-       PHY_C22(10, 10)
-       PHY_C22(11, 11)
-       PHY_C22(12, 12)
-       PHY_C22(13, 13)
-       PHY_C22(14, 14)
-       PHY_C22(15, 15)
-
-       /* External phy RTL8218B #3 */
-       PHY_C22(16, 16)
-       PHY_C22(17, 17)
-       PHY_C22(18, 18)
-       PHY_C22(19, 19)
-       PHY_C22(20, 20)
-       PHY_C22(21, 21)
-       PHY_C22(22, 22)
-       PHY_C22(23, 23)
+       ethernet-phy-package@0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+
+               PHY_C22(0, 0)
+               PHY_C22(1, 1)
+               PHY_C22(2, 2)
+               PHY_C22(3, 3)
+               PHY_C22(4, 4)
+               PHY_C22(5, 5)
+               PHY_C22(6, 6)
+               PHY_C22(7, 7)
+       };
+       ethernet-phy-package@8 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <8>;
+
+               PHY_C22(8, 8)
+               PHY_C22(9, 9)
+               PHY_C22(10, 10)
+               PHY_C22(11, 11)
+               PHY_C22(12, 12)
+               PHY_C22(13, 13)
+               PHY_C22(14, 14)
+               PHY_C22(15, 15)
+       };
+       ethernet-phy-package@16 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <16>;
+
+               PHY_C22(16, 16)
+               PHY_C22(17, 17)
+               PHY_C22(18, 18)
+               PHY_C22(19, 19)
+               PHY_C22(20, 20)
+               PHY_C22(21, 21)
+               PHY_C22(22, 22)
+               PHY_C22(23, 23)
+       };
 };
 
 &mdio_bus1 {
-       /* External phy RTL8218B #4 */
-       PHY_C22(24, 0)
-       PHY_C22(25, 1)
-       PHY_C22(26, 2)
-       PHY_C22(27, 3)
-       PHY_C22(28, 4)
-       PHY_C22(29, 5)
-       PHY_C22(30, 6)
-       PHY_C22(31, 7)
-
-       /* External phy RTL8218B #5 */
-       PHY_C22(32, 8)
-       PHY_C22(33, 9)
-       PHY_C22(34, 10)
-       PHY_C22(35, 11)
-       PHY_C22(36, 12)
-       PHY_C22(37, 13)
-       PHY_C22(38, 14)
-       PHY_C22(39, 15)
-
-       /* External phy RTL8218B #6 */
-       PHY_C22(40, 16)
-       PHY_C22(41, 17)
-       PHY_C22(42, 18)
-       PHY_C22(43, 19)
-       PHY_C22(44, 20)
-       PHY_C22(45, 21)
-       PHY_C22(46, 22)
-       PHY_C22(47, 23)
+       ethernet-phy-package@0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+
+               PHY_C22(24, 0)
+               PHY_C22(25, 1)
+               PHY_C22(26, 2)
+               PHY_C22(27, 3)
+               PHY_C22(28, 4)
+               PHY_C22(29, 5)
+               PHY_C22(30, 6)
+               PHY_C22(31, 7)
+       };
+       ethernet-phy-package@8 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <8>;
+
+               PHY_C22(32, 8)
+               PHY_C22(33, 9)
+               PHY_C22(34, 10)
+               PHY_C22(35, 11)
+               PHY_C22(36, 12)
+               PHY_C22(37, 13)
+               PHY_C22(38, 14)
+               PHY_C22(39, 15)
+       };
+       ethernet-phy-package@16 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <16>;
+
+               PHY_C22(40, 16)
+               PHY_C22(41, 17)
+               PHY_C22(42, 18)
+               PHY_C22(43, 19)
+               PHY_C22(44, 20)
+               PHY_C22(45, 21)
+               PHY_C22(46, 22)
+               PHY_C22(47, 23)
+       };
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl839x_zyxel_gs1920-24hp-common.dtsi b/target/linux/realtek/dts/rtl839x_zyxel_gs1920-24hp-common.dtsi
index eba9350c4d44c1d6fe4eab61a9ff86d0e6d841a0..08f6c463f8c6eb3cfce90056ea3b7b8c7ecc94ac 100644 (file)
--- a/target/linux/realtek/dts/rtl839x_zyxel_gs1920-24hp-common.dtsi
+++ b/target/linux/realtek/dts/rtl839x_zyxel_gs1920-24hp-common.dtsi
@@ -186,35 +186,48 @@
 };
 
 &mdio_bus0 {
-       /* External phy RTL8218B #1 */
-       PHY_C22(0, 0)
-       PHY_C22(1, 1)
-       PHY_C22(2, 2)
-       PHY_C22(3, 3)
-       PHY_C22(4, 4)
-       PHY_C22(5, 5)
-       PHY_C22(6, 6)
-       PHY_C22(7, 7)
-
-       /* External phy RTL8218B #2 */
-       PHY_C22(8, 8)
-       PHY_C22(9, 9)
-       PHY_C22(10, 10)
-       PHY_C22(11, 11)
-       PHY_C22(12, 12)
-       PHY_C22(13, 13)
-       PHY_C22(14, 14)
-       PHY_C22(15, 15)
-
-       /* External phy RTL8218B #3 */
-       PHY_C22(16, 16)
-       PHY_C22(17, 17)
-       PHY_C22(18, 18)
-       PHY_C22(19, 19)
-       PHY_C22(20, 20)
-       PHY_C22(21, 21)
-       PHY_C22(22, 22)
-       PHY_C22(23, 23)
+       ethernet-phy-package@0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+
+               PHY_C22(0, 0)
+               PHY_C22(1, 1)
+               PHY_C22(2, 2)
+               PHY_C22(3, 3)
+               PHY_C22(4, 4)
+               PHY_C22(5, 5)
+               PHY_C22(6, 6)
+               PHY_C22(7, 7)
+       };
+       ethernet-phy-package@8 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <8>;
+
+               PHY_C22(8, 8)
+               PHY_C22(9, 9)
+               PHY_C22(10, 10)
+               PHY_C22(11, 11)
+               PHY_C22(12, 12)
+               PHY_C22(13, 13)
+               PHY_C22(14, 14)
+               PHY_C22(15, 15)
+       };
+       ethernet-phy-package@16 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <16>;
+
+               PHY_C22(16, 16)
+               PHY_C22(17, 17)
+               PHY_C22(18, 18)
+               PHY_C22(19, 19)
+               PHY_C22(20, 20)
+               PHY_C22(21, 21)
+               PHY_C22(22, 22)
+               PHY_C22(23, 23)
+       };
 };
 
 &switch0 {

diff --git a/target/linux/realtek/dts/rtl9301_linksys_lgs328x_nand_common.dtsi b/target/linux/realtek/dts/rtl9301_linksys_lgs328x_nand_common.dtsi
index c38272bd08d2a277a7d07d0cc03a4cb330d3df7f..c34b6ebb7eaa825d9e7306eb3b98c930cbe48070 100644 (file)
--- a/target/linux/realtek/dts/rtl9301_linksys_lgs328x_nand_common.dtsi
+++ b/target/linux/realtek/dts/rtl9301_linksys_lgs328x_nand_common.dtsi
@@ -47,36 +47,54 @@
 };
 
 &mdio_bus0 {
-       PHY_C22(0, 0)
-       PHY_C22(1, 1)
-       PHY_C22(2, 2)
-       PHY_C22(3, 3)
-       PHY_C22(4, 4)
-       PHY_C22(5, 5)
-       PHY_C22(6, 6)
-       PHY_C22(7, 7)
+       ethernet-phy-package@0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+
+               PHY_C22(0, 0)
+               PHY_C22(1, 1)
+               PHY_C22(2, 2)
+               PHY_C22(3, 3)
+               PHY_C22(4, 4)
+               PHY_C22(5, 5)
+               PHY_C22(6, 6)
+               PHY_C22(7, 7)
+       };
 };
 
 &mdio_bus1 {
-       PHY_C22(8, 8)
-       PHY_C22(9, 9)
-       PHY_C22(10, 10)
-       PHY_C22(11, 11)
-       PHY_C22(12, 12)
-       PHY_C22(13, 13)
-       PHY_C22(14, 14)
-       PHY_C22(15, 15)
+       ethernet-phy-package@8 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <8>;
+
+               PHY_C22(8, 8)
+               PHY_C22(9, 9)
+               PHY_C22(10, 10)
+               PHY_C22(11, 11)
+               PHY_C22(12, 12)
+               PHY_C22(13, 13)
+               PHY_C22(14, 14)
+               PHY_C22(15, 15)
+       };
 };
 
 &mdio_bus2 {
-       PHY_C22(16, 16)
-       PHY_C22(17, 17)
-       PHY_C22(18, 18)
-       PHY_C22(19, 19)
-       PHY_C22(20, 20)
-       PHY_C22(21, 21)
-       PHY_C22(22, 22)
-       PHY_C22(23, 23)
+       ethernet-phy-package@16 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <16>;
+
+               PHY_C22(16, 16)
+               PHY_C22(17, 17)
+               PHY_C22(18, 18)
+               PHY_C22(19, 19)
+               PHY_C22(20, 20)
+               PHY_C22(21, 21)
+               PHY_C22(22, 22)
+               PHY_C22(23, 23)
+       };
 };
 
 &switch0 {