]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s28hx SEMPER flash
authorTakahiro Kuwano <Takahiro.Kuwano@infineon.com>
Thu, 6 Apr 2023 06:17:44 +0000 (15:17 +0900)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 May 2023 11:58:39 +0000 (13:58 +0200)
[ Upstream commit 9fd0945fe6fadfb6b54a9cd73be101c02b3e8134 ]

Infineon(Cypress) SEMPER NOR flash family has on-die ECC and its program
granularity is 16-byte ECC data unit size. JFFS2 supports write buffer
mode for ECC'd NOR flash. Provide a way to clear the MTD_BIT_WRITEABLE
flag in order to enable JFFS2 write buffer mode support.

A new SNOR_F_ECC flag is introduced to determine if the part has on-die
ECC and if it has, MTD_BIT_WRITEABLE is unset.

In vendor specific driver, a common cypress_nor_ecc_init() helper is
added. This helper takes care for ECC related initialization for SEMPER
flash family by setting up params->writesize and SNOR_F_ECC.

Fixes: c3266af101f2 ("mtd: spi-nor: spansion: add support for Cypress Semper flash")
Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/d586723f6f12aaff44fbcd7b51e674b47ed554ed.1680760742.git.Takahiro.Kuwano@infineon.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/mtd/spi-nor/core.c
drivers/mtd/spi-nor/core.h
drivers/mtd/spi-nor/debugfs.c
drivers/mtd/spi-nor/spansion.c

index 767b1faa32b0eec72c13fed690c916a428461a5a..d75db50767938f11530c5165ff8b7b8cc8bb37b1 100644 (file)
@@ -2983,6 +2983,9 @@ static void spi_nor_set_mtd_info(struct spi_nor *nor)
                mtd->name = dev_name(dev);
        mtd->type = MTD_NORFLASH;
        mtd->flags = MTD_CAP_NORFLASH;
+       /* Unset BIT_WRITEABLE to enable JFFS2 write buffer for ECC'd NOR */
+       if (nor->flags & SNOR_F_ECC)
+               mtd->flags &= ~MTD_BIT_WRITEABLE;
        if (nor->info->flags & SPI_NOR_NO_ERASE)
                mtd->flags |= MTD_NO_ERASE;
        else
index 57e8916965ea823ac8701da44936233ef6516685..75ec2e56042477736a5a0f02aa48af4319cacade 100644 (file)
@@ -131,6 +131,7 @@ enum spi_nor_option_flags {
        SNOR_F_SOFT_RESET       = BIT(12),
        SNOR_F_SWP_IS_VOLATILE  = BIT(13),
        SNOR_F_RWW              = BIT(14),
+       SNOR_F_ECC              = BIT(15),
 };
 
 struct spi_nor_read_command {
index bd8a18da49c049c3465aafee92d08171fc38c65a..285bdcbaa1134290bb8038b936fb649497c619ee 100644 (file)
@@ -26,6 +26,7 @@ static const char *const snor_f_names[] = {
        SNOR_F_NAME(SOFT_RESET),
        SNOR_F_NAME(SWP_IS_VOLATILE),
        SNOR_F_NAME(RWW),
+       SNOR_F_NAME(ECC),
 };
 #undef SNOR_F_NAME
 
index 07fe0f6fdfe3e7d51479cfe4528c3c099dcd0322..f4e9a1738234a80be9efe825dadbedaf4444b32a 100644 (file)
@@ -218,6 +218,17 @@ static int cypress_nor_set_page_size(struct spi_nor *nor)
        return 0;
 }
 
+static void cypress_nor_ecc_init(struct spi_nor *nor)
+{
+       /*
+        * Programming is supported only in 16-byte ECC data unit granularity.
+        * Byte-programming, bit-walking, or multiple program operations to the
+        * same ECC data unit without an erase are not allowed.
+        */
+       nor->params->writesize = 16;
+       nor->flags |= SNOR_F_ECC;
+}
+
 static int
 s25hx_t_post_bfpt_fixup(struct spi_nor *nor,
                        const struct sfdp_parameter_header *bfpt_header,
@@ -324,7 +335,7 @@ static int s28hx_t_post_bfpt_fixup(struct spi_nor *nor,
 static void s28hx_t_late_init(struct spi_nor *nor)
 {
        nor->params->octal_dtr_enable = cypress_nor_octal_dtr_enable;
-       nor->params->writesize = 16;
+       cypress_nor_ecc_init(nor);
 }
 
 static const struct spi_nor_fixups s28hx_t_fixups = {