dt-bindings: clock: rzg2l: Drop power domain IDs

Since the configuration order between the individual MSTOP and CLKON
bits cannot be preserved with the power domain abstraction, drop the
power domain IDs.  The corresponding code has also been removed.
Currently, there are no device tree users for these IDs.

Acked-by: "Rob Herring (Arm)" <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20250527112403.1254122-8-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/include/dt-bindings/clock/r9a07g043-cpg.h b/include/dt-bindings/clock/r9a07g043-cpg.h
index 1319933437779071b41bea735caaa3c914ee29b8..e1f65f1928cf7d4ce425fce5f3b4c44867f48dfd 100644 (file)
--- a/include/dt-bindings/clock/r9a07g043-cpg.h
+++ b/include/dt-bindings/clock/r9a07g043-cpg.h
@@ -200,57 +200,4 @@
 #define R9A07G043_AX45MP_CORE0_RESETN  78      /* RZ/Five Only */
 #define R9A07G043_IAX45_RESETN         79      /* RZ/Five Only */
 
-/* Power domain IDs. */
-#define R9A07G043_PD_ALWAYS_ON         0
-#define R9A07G043_PD_GIC               1       /* RZ/G2UL Only */
-#define R9A07G043_PD_IA55              2       /* RZ/G2UL Only */
-#define R9A07G043_PD_MHU               3       /* RZ/G2UL Only */
-#define R9A07G043_PD_CORESIGHT         4       /* RZ/G2UL Only */
-#define R9A07G043_PD_SYC               5       /* RZ/G2UL Only */
-#define R9A07G043_PD_DMAC              6
-#define R9A07G043_PD_GTM0              7
-#define R9A07G043_PD_GTM1              8
-#define R9A07G043_PD_GTM2              9
-#define R9A07G043_PD_MTU               10
-#define R9A07G043_PD_POE3              11
-#define R9A07G043_PD_WDT0              12
-#define R9A07G043_PD_SPI               13
-#define R9A07G043_PD_SDHI0             14
-#define R9A07G043_PD_SDHI1             15
-#define R9A07G043_PD_ISU               16      /* RZ/G2UL Only */
-#define R9A07G043_PD_CRU               17      /* RZ/G2UL Only */
-#define R9A07G043_PD_LCDC              18      /* RZ/G2UL Only */
-#define R9A07G043_PD_SSI0              19
-#define R9A07G043_PD_SSI1              20
-#define R9A07G043_PD_SSI2              21
-#define R9A07G043_PD_SSI3              22
-#define R9A07G043_PD_SRC               23
-#define R9A07G043_PD_USB0              24
-#define R9A07G043_PD_USB1              25
-#define R9A07G043_PD_USB_PHY           26
-#define R9A07G043_PD_ETHER0            27
-#define R9A07G043_PD_ETHER1            28
-#define R9A07G043_PD_I2C0              29
-#define R9A07G043_PD_I2C1              30
-#define R9A07G043_PD_I2C2              31
-#define R9A07G043_PD_I2C3              32
-#define R9A07G043_PD_SCIF0             33
-#define R9A07G043_PD_SCIF1             34
-#define R9A07G043_PD_SCIF2             35
-#define R9A07G043_PD_SCIF3             36
-#define R9A07G043_PD_SCIF4             37
-#define R9A07G043_PD_SCI0              38
-#define R9A07G043_PD_SCI1              39
-#define R9A07G043_PD_IRDA              40
-#define R9A07G043_PD_RSPI0             41
-#define R9A07G043_PD_RSPI1             42
-#define R9A07G043_PD_RSPI2             43
-#define R9A07G043_PD_CANFD             44
-#define R9A07G043_PD_ADC               45
-#define R9A07G043_PD_TSU               46
-#define R9A07G043_PD_PLIC              47      /* RZ/Five Only */
-#define R9A07G043_PD_IAX45             48      /* RZ/Five Only */
-#define R9A07G043_PD_NCEPLDM           49      /* RZ/Five Only */
-#define R9A07G043_PD_NCEPLMT           50      /* RZ/Five Only */
-
 #endif /* __DT_BINDINGS_CLOCK_R9A07G043_CPG_H__ */

diff --git a/include/dt-bindings/clock/r9a07g044-cpg.h b/include/dt-bindings/clock/r9a07g044-cpg.h
index e209f96f92b7efe93fb0476036b9c1f13ef919ef..0bb17ff1a01a7365d8e82c6526df50375fa8c382 100644 (file)
--- a/include/dt-bindings/clock/r9a07g044-cpg.h
+++ b/include/dt-bindings/clock/r9a07g044-cpg.h
@@ -217,62 +217,4 @@
 #define R9A07G044_ADC_ADRST_N          82
 #define R9A07G044_TSU_PRESETN          83
 
-/* Power domain IDs. */
-#define R9A07G044_PD_ALWAYS_ON         0
-#define R9A07G044_PD_GIC               1
-#define R9A07G044_PD_IA55              2
-#define R9A07G044_PD_MHU               3
-#define R9A07G044_PD_CORESIGHT         4
-#define R9A07G044_PD_SYC               5
-#define R9A07G044_PD_DMAC              6
-#define R9A07G044_PD_GTM0              7
-#define R9A07G044_PD_GTM1              8
-#define R9A07G044_PD_GTM2              9
-#define R9A07G044_PD_MTU               10
-#define R9A07G044_PD_POE3              11
-#define R9A07G044_PD_GPT               12
-#define R9A07G044_PD_POEGA             13
-#define R9A07G044_PD_POEGB             14
-#define R9A07G044_PD_POEGC             15
-#define R9A07G044_PD_POEGD             16
-#define R9A07G044_PD_WDT0              17
-#define R9A07G044_PD_WDT1              18
-#define R9A07G044_PD_SPI               19
-#define R9A07G044_PD_SDHI0             20
-#define R9A07G044_PD_SDHI1             21
-#define R9A07G044_PD_3DGE              22
-#define R9A07G044_PD_ISU               23
-#define R9A07G044_PD_VCPL4             24
-#define R9A07G044_PD_CRU               25
-#define R9A07G044_PD_MIPI_DSI          26
-#define R9A07G044_PD_LCDC              27
-#define R9A07G044_PD_SSI0              28
-#define R9A07G044_PD_SSI1              29
-#define R9A07G044_PD_SSI2              30
-#define R9A07G044_PD_SSI3              31
-#define R9A07G044_PD_SRC               32
-#define R9A07G044_PD_USB0              33
-#define R9A07G044_PD_USB1              34
-#define R9A07G044_PD_USB_PHY           35
-#define R9A07G044_PD_ETHER0            36
-#define R9A07G044_PD_ETHER1            37
-#define R9A07G044_PD_I2C0              38
-#define R9A07G044_PD_I2C1              39
-#define R9A07G044_PD_I2C2              40
-#define R9A07G044_PD_I2C3              41
-#define R9A07G044_PD_SCIF0             42
-#define R9A07G044_PD_SCIF1             43
-#define R9A07G044_PD_SCIF2             44
-#define R9A07G044_PD_SCIF3             45
-#define R9A07G044_PD_SCIF4             46
-#define R9A07G044_PD_SCI0              47
-#define R9A07G044_PD_SCI1              48
-#define R9A07G044_PD_IRDA              49
-#define R9A07G044_PD_RSPI0             50
-#define R9A07G044_PD_RSPI1             51
-#define R9A07G044_PD_RSPI2             52
-#define R9A07G044_PD_CANFD             53
-#define R9A07G044_PD_ADC               54
-#define R9A07G044_PD_TSU               55
-
 #endif /* __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__ */

diff --git a/include/dt-bindings/clock/r9a07g054-cpg.h b/include/dt-bindings/clock/r9a07g054-cpg.h
index 2c99f89397c4caa7d97bcded6dd5bdf6bc090906..43f4dbda872cc04f37fa7c4fd59c32c15d78b9bd 100644 (file)
--- a/include/dt-bindings/clock/r9a07g054-cpg.h
+++ b/include/dt-bindings/clock/r9a07g054-cpg.h
@@ -226,62 +226,4 @@
 #define R9A07G054_TSU_PRESETN          83
 #define R9A07G054_STPAI_ARESETN                84
 
-/* Power domain IDs. */
-#define R9A07G054_PD_ALWAYS_ON         0
-#define R9A07G054_PD_GIC               1
-#define R9A07G054_PD_IA55              2
-#define R9A07G054_PD_MHU               3
-#define R9A07G054_PD_CORESIGHT         4
-#define R9A07G054_PD_SYC               5
-#define R9A07G054_PD_DMAC              6
-#define R9A07G054_PD_GTM0              7
-#define R9A07G054_PD_GTM1              8
-#define R9A07G054_PD_GTM2              9
-#define R9A07G054_PD_MTU               10
-#define R9A07G054_PD_POE3              11
-#define R9A07G054_PD_GPT               12
-#define R9A07G054_PD_POEGA             13
-#define R9A07G054_PD_POEGB             14
-#define R9A07G054_PD_POEGC             15
-#define R9A07G054_PD_POEGD             16
-#define R9A07G054_PD_WDT0              17
-#define R9A07G054_PD_WDT1              18
-#define R9A07G054_PD_SPI               19
-#define R9A07G054_PD_SDHI0             20
-#define R9A07G054_PD_SDHI1             21
-#define R9A07G054_PD_3DGE              22
-#define R9A07G054_PD_ISU               23
-#define R9A07G054_PD_VCPL4             24
-#define R9A07G054_PD_CRU               25
-#define R9A07G054_PD_MIPI_DSI          26
-#define R9A07G054_PD_LCDC              27
-#define R9A07G054_PD_SSI0              28
-#define R9A07G054_PD_SSI1              29
-#define R9A07G054_PD_SSI2              30
-#define R9A07G054_PD_SSI3              31
-#define R9A07G054_PD_SRC               32
-#define R9A07G054_PD_USB0              33
-#define R9A07G054_PD_USB1              34
-#define R9A07G054_PD_USB_PHY           35
-#define R9A07G054_PD_ETHER0            36
-#define R9A07G054_PD_ETHER1            37
-#define R9A07G054_PD_I2C0              38
-#define R9A07G054_PD_I2C1              39
-#define R9A07G054_PD_I2C2              40
-#define R9A07G054_PD_I2C3              41
-#define R9A07G054_PD_SCIF0             42
-#define R9A07G054_PD_SCIF1             43
-#define R9A07G054_PD_SCIF2             44
-#define R9A07G054_PD_SCIF3             45
-#define R9A07G054_PD_SCIF4             46
-#define R9A07G054_PD_SCI0              47
-#define R9A07G054_PD_SCI1              48
-#define R9A07G054_PD_IRDA              49
-#define R9A07G054_PD_RSPI0             50
-#define R9A07G054_PD_RSPI1             51
-#define R9A07G054_PD_RSPI2             52
-#define R9A07G054_PD_CANFD             53
-#define R9A07G054_PD_ADC               54
-#define R9A07G054_PD_TSU               55
-
 #endif /* __DT_BINDINGS_CLOCK_R9A07G054_CPG_H__ */

diff --git a/include/dt-bindings/clock/r9a08g045-cpg.h b/include/dt-bindings/clock/r9a08g045-cpg.h
index 311521fe4b59c5ca6cbecf0565f67e7331fbaa53..410725b778a86c9ee91e82296c9d5216f3e7c2ac 100644 (file)
--- a/include/dt-bindings/clock/r9a08g045-cpg.h
+++ b/include/dt-bindings/clock/r9a08g045-cpg.h
@@ -239,75 +239,4 @@
 #define R9A08G045_I3C_PRESETN          92
 #define R9A08G045_VBAT_BRESETN         93
 
-/* Power domain IDs. */
-#define R9A08G045_PD_ALWAYS_ON         0
-#define R9A08G045_PD_GIC               1
-#define R9A08G045_PD_IA55              2
-#define R9A08G045_PD_MHU               3
-#define R9A08G045_PD_CORESIGHT         4
-#define R9A08G045_PD_SYC               5
-#define R9A08G045_PD_DMAC              6
-#define R9A08G045_PD_GTM0              7
-#define R9A08G045_PD_GTM1              8
-#define R9A08G045_PD_GTM2              9
-#define R9A08G045_PD_GTM3              10
-#define R9A08G045_PD_GTM4              11
-#define R9A08G045_PD_GTM5              12
-#define R9A08G045_PD_GTM6              13
-#define R9A08G045_PD_GTM7              14
-#define R9A08G045_PD_MTU               15
-#define R9A08G045_PD_POE3              16
-#define R9A08G045_PD_GPT               17
-#define R9A08G045_PD_POEGA             18
-#define R9A08G045_PD_POEGB             19
-#define R9A08G045_PD_POEGC             20
-#define R9A08G045_PD_POEGD             21
-#define R9A08G045_PD_WDT0              22
-#define R9A08G045_PD_XSPI              23
-#define R9A08G045_PD_SDHI0             24
-#define R9A08G045_PD_SDHI1             25
-#define R9A08G045_PD_SDHI2             26
-#define R9A08G045_PD_SSI0              27
-#define R9A08G045_PD_SSI1              28
-#define R9A08G045_PD_SSI2              29
-#define R9A08G045_PD_SSI3              30
-#define R9A08G045_PD_SRC               31
-#define R9A08G045_PD_USB0              32
-#define R9A08G045_PD_USB1              33
-#define R9A08G045_PD_USB_PHY           34
-#define R9A08G045_PD_ETHER0            35
-#define R9A08G045_PD_ETHER1            36
-#define R9A08G045_PD_I2C0              37
-#define R9A08G045_PD_I2C1              38
-#define R9A08G045_PD_I2C2              39
-#define R9A08G045_PD_I2C3              40
-#define R9A08G045_PD_SCIF0             41
-#define R9A08G045_PD_SCIF1             42
-#define R9A08G045_PD_SCIF2             43
-#define R9A08G045_PD_SCIF3             44
-#define R9A08G045_PD_SCIF4             45
-#define R9A08G045_PD_SCIF5             46
-#define R9A08G045_PD_SCI0              47
-#define R9A08G045_PD_SCI1              48
-#define R9A08G045_PD_IRDA              49
-#define R9A08G045_PD_RSPI0             50
-#define R9A08G045_PD_RSPI1             51
-#define R9A08G045_PD_RSPI2             52
-#define R9A08G045_PD_RSPI3             53
-#define R9A08G045_PD_RSPI4             54
-#define R9A08G045_PD_CANFD             55
-#define R9A08G045_PD_ADC               56
-#define R9A08G045_PD_TSU               57
-#define R9A08G045_PD_OCTA              58
-#define R9A08G045_PD_PDM               59
-#define R9A08G045_PD_PCI               60
-#define R9A08G045_PD_SPDIF             61
-#define R9A08G045_PD_I3C               62
-#define R9A08G045_PD_VBAT              63
-
-#define R9A08G045_PD_DDR               64
-#define R9A08G045_PD_TZCDDR            65
-#define R9A08G045_PD_OTFDE_DDR         66
-#define R9A08G045_PD_RTC               67
-
 #endif /* __DT_BINDINGS_CLOCK_R9A08G045_CPG_H__ */