soc: microchip: add mfd drivers for two syscon regions on PolarFire SoC

The control-scb and mss-top-sysreg regions on PolarFire SoC both fulfill
multiple purposes. The former is used for mailbox functions in addition
to the temperature & voltage sensor while the latter is used for clocks,
resets, interrupt muxing and pinctrl.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/drivers/soc/microchip/Kconfig b/drivers/soc/microchip/Kconfig
index 19f4b576f822b2e57309308f5294914af27df570..bcf5546025610bd605fcb81e4a700684665b32fc 100644 (file)
--- a/drivers/soc/microchip/Kconfig
+++ b/drivers/soc/microchip/Kconfig
@@ -9,3 +9,15 @@ config POLARFIRE_SOC_SYS_CTRL
          module will be called mpfs_system_controller.
 
          If unsure, say N.
+
+config POLARFIRE_SOC_SYSCONS
+       bool "PolarFire SoC (MPFS) syscon drivers"
+       default y
+       depends on ARCH_MICROCHIP
+       select MFD_CORE
+       help
+         These drivers add support for the syscons on PolarFire SoC (MPFS).
+         Without these drivers core parts of the kernel such as clocks
+         and resets will not function correctly.
+
+         If unsure, and on a PolarFire SoC, say y.

diff --git a/drivers/soc/microchip/Makefile b/drivers/soc/microchip/Makefile
index 14489919fe4b397eba5b89490d66ba2aa4c92d87..1a3a1594b089b15a2e1f0a24ab04828a45ce3a64 100644 (file)
--- a/drivers/soc/microchip/Makefile
+++ b/drivers/soc/microchip/Makefile
@@ -1 +1,2 @@
 obj-$(CONFIG_POLARFIRE_SOC_SYS_CTRL)   += mpfs-sys-controller.o
+obj-$(CONFIG_POLARFIRE_SOC_SYSCONS)    += mpfs-control-scb.o mpfs-mss-top-sysreg.o

diff --git a/drivers/soc/microchip/mpfs-control-scb.c b/drivers/soc/microchip/mpfs-control-scb.c
new file mode 100644 (file)
index 0000000..f0b84b1
--- /dev/null
+++ b/drivers/soc/microchip/mpfs-control-scb.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/array_size.h>
+#include <linux/of.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/syscon.h>
+#include <linux/platform_device.h>
+
+static const struct mfd_cell mpfs_control_scb_devs[] = {
+       MFD_CELL_NAME("mpfs-tvs"),
+};
+
+static int mpfs_control_scb_probe(struct platform_device *pdev)
+{
+       struct device *dev = &pdev->dev;
+
+       return mfd_add_devices(dev, PLATFORM_DEVID_NONE, mpfs_control_scb_devs,
+                              ARRAY_SIZE(mpfs_control_scb_devs), NULL, 0, NULL);
+}
+
+static const struct of_device_id mpfs_control_scb_of_match[] = {
+       { .compatible = "microchip,mpfs-control-scb", },
+       {},
+};
+MODULE_DEVICE_TABLE(of, mpfs_control_scb_of_match);
+
+static struct platform_driver mpfs_control_scb_driver = {
+       .driver = {
+               .name = "mpfs-control-scb",
+               .of_match_table = mpfs_control_scb_of_match,
+       },
+       .probe = mpfs_control_scb_probe,
+};
+module_platform_driver(mpfs_control_scb_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>");
+MODULE_DESCRIPTION("PolarFire SoC control scb driver");

diff --git a/drivers/soc/microchip/mpfs-mss-top-sysreg.c b/drivers/soc/microchip/mpfs-mss-top-sysreg.c
new file mode 100644 (file)
index 0000000..b2244e4
--- /dev/null
+++ b/drivers/soc/microchip/mpfs-mss-top-sysreg.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/array_size.h>
+#include <linux/of.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+static const struct mfd_cell mpfs_mss_top_sysreg_devs[] = {
+       MFD_CELL_NAME("mpfs-reset"),
+};
+
+static int mpfs_mss_top_sysreg_probe(struct platform_device *pdev)
+{
+       struct device *dev = &pdev->dev;
+       int ret;
+
+       ret = mfd_add_devices(dev, PLATFORM_DEVID_NONE, mpfs_mss_top_sysreg_devs,
+                             ARRAY_SIZE(mpfs_mss_top_sysreg_devs) , NULL, 0, NULL);
+       if (ret)
+               return ret;
+
+       return devm_of_platform_populate(dev);
+}
+
+static const struct of_device_id mpfs_mss_top_sysreg_of_match[] = {
+       { .compatible = "microchip,mpfs-mss-top-sysreg", },
+       {},
+};
+MODULE_DEVICE_TABLE(of, mpfs_mss_top_sysreg_of_match);
+
+static struct platform_driver mpfs_mss_top_sysreg_driver = {
+       .driver = {
+               .name = "mpfs-mss-top-sysreg",
+               .of_match_table = mpfs_mss_top_sysreg_of_match,
+       },
+       .probe = mpfs_mss_top_sysreg_probe,
+};
+module_platform_driver(mpfs_mss_top_sysreg_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>");
+MODULE_DESCRIPTION("PolarFire SoC mss top sysreg driver");