i386 PIE: testsuite: cope with default pie on ia32

This patch continues the effort of cleaning up the testsuite for
--enable-default-pie; the focus herein is mostly 32-bit x86.

As much as I tried to avoid it, most of the changes to the testsuite
simply disable PIC/PIE, for reasons I'm going to detail below.

static-cdtor1.C gets new patterns to match PIE output.  Some
avx512fp16 tests change only in register allocation, because of the
register used to hold the GOT base address.  Interrupt tests changed
in this regard as well, but here it also affected register saving and
restoring.

The previous patch modified cet-sjlj tests, mentioning a single regexp
covering PIC and nonPIC got incorrect match counts.  I found out that
adding ?: to parenthesized subpatterns avoids miscounting matches.
Other tests that count certain kinds of insns needed adjustment over
insns in get_pc_thunk, extra loads from the GOT, or extra adds to
compute addresses.  In one case, namely stack-check-12, it is nonPIC
that had extra insns, that PIC gets rid of, or rather, pushing and
popping the PIC register obviates the dummy push and matching pop used
for stack probing in nonpic.

pr95126 tests were supposed to optimize loads into known constants,
but the @GOTOFF addresses prevent that for reasons I have not
investigated, but that would be clearly desirable, so I've XFAILed
these.  pr95852 is another case of missed optimization: sibcalls are
not possible when the PIC register needs to be set up for the call,
which prevents the expected constant propagation to the return block;
I have adjusted the codegen expectations of these tests.

As for tests that disable PIE...  Some are judgment calls, that fail
for similar reasons as tests described above, but I chose not to
adjust their expectations; others are just not possible with PIC, or
not worth the effort of adjusting.

anon[14].C check for no global or comdat symbols, respectively, but
-fPIE outputs get_pc_thunk, as global hidden comdat.
initlist-const1.C wants .rodata and checks for no .data, but PIC
outputs constant data that needs relocations in .data.rel.ro.local.
no-stack-protector-attr-3.C and stackprotectexplicit2.C count
stack_check_fail matches; -fPIE calls stack_check_fail_local instead,
which matches the pattern, but this symbol is also marked as .hidden,
so the match count needs to be adjusted.

pr71694.C checks for no movl, but get_pc_thunk contains one.
pr102892-1.c is a missed optimization, ivopts creates an induction
variable because the array address can't be part of an indexing base
address with PIE, and that ends up stopping a load from being resolved
to a constant as expected.  sibcall-11.c needs @PLT for the call,
which requires the PIC register, which makes sibcalling impossible.
builtin-self.c, in turn, expects no calls, but PIC calls get_pc_thunk.

avx* vector tests that had PIE disabled were affected in that the need
for GOT-based addressing modes changed instruction selection in ways
that deviated from the expectations of the tests.  Ditto other vector
tests: pr100865*, pr101796-1, pr101846, pr101989-broadcast-1, and
pr102021, pr54855-[37], and pr90773-17.

pr15184* tests need a PIC register to access global variables, which
affects register allocation, so the patterns would have to be
adjusted.  pr27971 can't use the expected addressing mode to
dereference the array with PIC, so it ends up selecting an indexed
addressing mode, obviating the expected separate shift insn.

pr70263-2 is another case that implicitly expects a sibcall,
impossible because of the need for the PIC register; without a
sibcall, the expected REG_EQUIV for the reuse of the stack slot of an
incoming argument does not occur.  pr78035 duplicates the final
compare in both then and else blocks with PIE, which deviates from the
expected cmp count.  pr81736-[57] test for no frame pointer, but the
PIC register assignment to a call-saved register forces a frame; the
former ends up not using the PIC register, but it's only optimized out
after committing to a stack frame to preserve it.  pr85620-6 also
expects a tail call in a situation that is impossible on ia32 PIC.

pr85667-6 doesn't expect the movl in get_pc_thunk.  pr93492-5 tests
-mfentry, not available with PIC on ia32.  pr96539 expects a
tail-call, to avoid copying a large-ish struct argument, but the call
requires the PIC register, so no tail-call.  stack-prot-sym.c expects
a nonpic addressing mode.

for  gcc/testsuite/ChangeLog

	* g++.dg/abi/anon1.C: Disable pie on ia32.
	* g++.dg/abi/anon4.C: Likewise.
	* g++.dg/cpp0x/initlist-const1.C: Likewise.
	* g++.dg/no-stack-protector-attr-3.C: Likewise.
	* g++.dg/stackprotectexplicit2.C: Likewise.
	* g++.dg/pr71694.C: Likewise.
	* gcc.dg/pr102892-1.c: Likewise.
	* gcc.dg/sibcall-11.c: Likewise.
	* gcc.dg/torture/builtin-self.c: Likewise.
	* gcc.target/i386/avx2-dest-false-dep-for-glc.c: Likewise.
	* gcc.target/i386/avx512bf16-cvtsbh2ss-1.c: Likewise.
	* gcc.target/i386/avx512f-broadcast-pr87767-1.c: Likewise.
	* gcc.target/i386/avx512f-broadcast-pr87767-3.c: Likewise.
	* gcc.target/i386/avx512f-broadcast-pr87767-5.c: Likewise.
	* gcc.target/i386/avx512f-broadcast-pr87767-7.c: Likewise.
	* gcc.target/i386/avx512fp16-broadcast-1.c: Likewise.
	* gcc.target/i386/avx512fp16-pr101846.c: Likewise.
	* gcc.target/i386/avx512vl-broadcast-pr87767-1.c: Likewise.
	* gcc.target/i386/avx512vl-broadcast-pr87767-3.c: Likewise.
	* gcc.target/i386/avx512vl-broadcast-pr87767-5.c: Likewise.
	* gcc.target/i386/pr100865-2.c: Likewise.
	* gcc.target/i386/pr100865-3.c: Likewise.
	* gcc.target/i386/pr100865-4a.c: Likewise.
	* gcc.target/i386/pr100865-4b.c: Likewise.
	* gcc.target/i386/pr100865-5a.c: Likewise.
	* gcc.target/i386/pr100865-5b.c: Likewise.
	* gcc.target/i386/pr100865-6a.c: Likewise.
	* gcc.target/i386/pr100865-6b.c: Likewise.
	* gcc.target/i386/pr100865-6c.c: Likewise.
	* gcc.target/i386/pr100865-7b.c: Likewise.
	* gcc.target/i386/pr101796-1.c: Likewise.
	* gcc.target/i386/pr101846-2.c: Likewise.
	* gcc.target/i386/pr101989-broadcast-1.c: Likewise.
	* gcc.target/i386/pr102021.c: Likewise.
	* gcc.target/i386/pr90773-17.c: Likewise.
	* gcc.target/i386/pr54855-3.c: Likewise.
	* gcc.target/i386/pr54855-7.c: Likewise.
	* gcc.target/i386/pr15184-1.c: Likewise.
	* gcc.target/i386/pr15184-2.c: Likewise.
	* gcc.target/i386/pr27971.c: Likewise.
	* gcc.target/i386/pr70263-2.c: Likewise.
	* gcc.target/i386/pr78035.c: Likewise.
	* gcc.target/i386/pr81736-5.c: Likewise.
	* gcc.target/i386/pr81736-7.c: Likewise.
	* gcc.target/i386/pr85620-6.c: Likewise.
	* gcc.target/i386/pr85667-6.c: Likewise.
	* gcc.target/i386/pr93492-5.c: Likewise.
	* gcc.target/i386/pr96539.c: Likewise.
	PR target/81708 (%gs:my_guard)
	* gcc.target/i386/stack-prot-sym.c: Likewise.
	* g++.dg/init/static-cdtor1.C: Add alternate patterns for PIC.
	* gcc.target/i386/avx512fp16-vcvtsh2si-1a.c: Extend patterns
	for PIC/PIE register allocation.
	* gcc.target/i386/pr100704-3.c: Likewise.
	* gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c: Likewise.
	* gcc.target/i386/avx512fp16-vcvttsh2si-1a.c: Likewise.
	* gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c: Likewise.
	* gcc.target/i386/avx512fp16-vmovsh-1a.c: Likewise.
	* gcc.target/i386/interrupt-11.c: Likewise, allowing for
	preservation of the PIC register.
	* gcc.target/i386/interrupt-12.c: Likewise.
	* gcc.target/i386/interrupt-13.c: Likewise.
	* gcc.target/i386/interrupt-15.c: Likewise.
	* gcc.target/i386/interrupt-16.c: Likewise.
	* gcc.target/i386/interrupt-17.c: Likewise.
	* gcc.target/i386/interrupt-8.c: Likewise.
	* gcc.target/i386/cet-sjlj-6a.c: Combine patterns from
	previous change.
	* gcc.target/i386/cet-sjlj-6b.c: Likewise.
	* gcc.target/i386/pad-10.c: Accept insns in get_pc_thunk.
	* gcc.target/i386/pr70321.c: Likewise.
	* gcc.target/i386/pr81563.c: Likewise.
	* gcc.target/i386/pr84278.c: Likewise.
	* gcc.target/i386/pr90773-2.c: Likewise, plus extra loads from
	the GOT.
	* gcc.target/i386/pr90773-3.c: Likewise.
	* gcc.target/i386/pr94913-2.c: Accept additional PIC insns.
	* gcc.target/i386/stack-check-17.c: Likewise.
	* gcc.target/i386/stack-check-12.c: Do not require dummy stack
	probing obviated with PIC.
	* gcc.target/i386/pr95126-m32-1.c: Expect missed optimization
	with PIC.
	* gcc.target/i386/pr95126-m32-2.c: Likewise.
	* gcc.target/i386/pr95852-2.c: Accept different optimization
	with PIC.
	* gcc.target/i386/pr95852-4.c: Likewise.

diff --git a/gcc/testsuite/g++.dg/abi/anon1.C b/gcc/testsuite/g++.dg/abi/anon1.C
index 0fb4ae8fe72caaea9622a84649a5fbc2a9e6826c..52018c317c45ff061838613f815370f59596fefa 100644 (file)
--- a/gcc/testsuite/g++.dg/abi/anon1.C
+++ b/gcc/testsuite/g++.dg/abi/anon1.C
@@ -1,4 +1,5 @@
 // PR c++/54883
+// { dg-additional-options "-fno-pie" { target ia32 } }
 
 namespace { enum E { E1 }; } void f(E e) { }
 

diff --git a/gcc/testsuite/g++.dg/abi/anon4.C b/gcc/testsuite/g++.dg/abi/anon4.C
index 8200f4bb270f9af7be7064a294a27fac894c8a16..517cc5284437b462e7219bb4dada029faa4e7ba7 100644 (file)
--- a/gcc/testsuite/g++.dg/abi/anon4.C
+++ b/gcc/testsuite/g++.dg/abi/anon4.C
@@ -1,5 +1,5 @@
 // PR c++/65209
-// { dg-additional-options "-fno-pie" { target sparc*-*-* } }
+// { dg-additional-options "-fno-pie" { target { ia32 || sparc*-*-* } } }
 // { dg-final { scan-assembler-not "comdat" } }
 
 // Everything involving the anonymous namespace bits should be private, not

diff --git a/gcc/testsuite/g++.dg/cpp0x/initlist-const1.C b/gcc/testsuite/g++.dg/cpp0x/initlist-const1.C
index b80410d8a625631d53a5223a600ef3eebb64e2ee..0da07592f75e04a35bbdace0a171315d8ea22bc9 100644 (file)
--- a/gcc/testsuite/g++.dg/cpp0x/initlist-const1.C
+++ b/gcc/testsuite/g++.dg/cpp0x/initlist-const1.C
@@ -1,4 +1,6 @@
 // { dg-do compile { target c++11 } }
+/* PIC uses .data.rel.ro.local rather than .rodata.  */
+/* { dg-additional-options "-fno-PIE" } */
 
 #include <initializer_list>
 

diff --git a/gcc/testsuite/g++.dg/init/static-cdtor1.C b/gcc/testsuite/g++.dg/init/static-cdtor1.C
index 343178a611409fe905acda30d8e4f1e1ef5e6e0c..d4d85f99c43c1edf486930a3f72f90ccb9a824cd 100644 (file)
--- a/gcc/testsuite/g++.dg/init/static-cdtor1.C
+++ b/gcc/testsuite/g++.dg/init/static-cdtor1.C
@@ -3,9 +3,11 @@
 // Make sure we emit initializers in the correct order.
 
 // ctors
-// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_0v:.*movl  \$var1[^\n]*\n[^\n]*_ZN5LeelaC1Ev[^\n]*\n[^\n]*movl     \$var2[^\n]*\n[^\n]*_ZN5LeelaC1Ev[^\n]*\n[^\n]*movl     \$var3[^\n]*\n[^\n]*_ZN5LeelaC1Ev} } }
+// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_0v:.*movl  \$var1[^\n]*\n[^\n]*_ZN5LeelaC1Ev[^\n]*\n[^\n]*movl     \$var2[^\n]*\n[^\n]*_ZN5LeelaC1Ev[^\n]*\n[^\n]*movl     \$var3[^\n]*\n[^\n]*_ZN5LeelaC1Ev} { target nonpic } } }
+// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_0v:.*leaq  var1[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaC1Ev[^\n]*\n[^\n]*leaq        var2[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaC1Ev[^\n]*\n[^\n]*leaq        var3[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaC1Ev} { target { ! nonpic } } } }
 // dtors
-// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_1v:.*movl  \$var3[^\n]*\n[^\n]*_ZN5LeelaD1Ev[^\n]*\n[^\n]*movl     \$var2[^\n]*\n[^\n]*_ZN5LeelaD1Ev[^\n]*\n[^\n]*movl     \$var1[^\n]*\n[^\n]*_ZN5LeelaD1Ev} } }
+// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_1v:.*movl  \$var3[^\n]*\n[^\n]*_ZN5LeelaD1Ev[^\n]*\n[^\n]*movl     \$var2[^\n]*\n[^\n]*_ZN5LeelaD1Ev[^\n]*\n[^\n]*movl     \$var1[^\n]*\n[^\n]*_ZN5LeelaD1Ev} { target nonpic } } }
+// { dg-final { scan-assembler {_Z41__static_initialization_and_destruction_1v:.*leaq  var3[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaD1Ev[^\n]*\n[^\n]*leaq        var2[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaD1Ev[^\n]*\n[^\n]*leaq        var1[^\n]*\n[^\n]*(?:|movq[^\n]*\n[^\n]*)_ZN5LeelaD1Ev} { target { ! nonpic } } } }
 
 struct Leela {
   Leela ();

diff --git a/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C b/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C
index 76a5ec086814587cc32e238e15a4a57fda56b583..147c2b79f780b6fda2f22a04f03ba6ed924d4d5b 100644 (file)
--- a/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C
+++ b/gcc/testsuite/g++.dg/no-stack-protector-attr-3.C
@@ -3,6 +3,7 @@
 
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-O2 -fstack-protector-explicit" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 /* { dg-do compile { target { ! hppa*-*-* } } } */
 

diff --git a/gcc/testsuite/g++.dg/pr71694.C b/gcc/testsuite/g++.dg/pr71694.C
index 5b59f879fbf954c45cae6c02b435efc6a94abc6e..60f246ff83ee89d00e015d20e4b651b935fca113 100644 (file)
--- a/gcc/testsuite/g++.dg/pr71694.C
+++ b/gcc/testsuite/g++.dg/pr71694.C
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -fno-store-merging" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-fno-common -mdynamic-no-pic" { target { ia32 && { x86_64-*-darwin* i?86-*-darwin* } } } } */
 
 struct B {

diff --git a/gcc/testsuite/g++.dg/stackprotectexplicit2.C b/gcc/testsuite/g++.dg/stackprotectexplicit2.C
index 35d9e886ccf7045c69ffa34e5186c4c42210baa6..70d8df4c73de2447d9ac29d7d37121fb2fdf6dbe 100644 (file)
--- a/gcc/testsuite/g++.dg/stackprotectexplicit2.C
+++ b/gcc/testsuite/g++.dg/stackprotectexplicit2.C
@@ -2,6 +2,7 @@
 
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
 /* { dg-options "-O2 -fstack-protector-explicit" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 int A()
 {

diff --git a/gcc/testsuite/gcc.dg/pr102892-1.c b/gcc/testsuite/gcc.dg/pr102892-1.c
index a9302b536df6bbdabe535f84a5555fb43a05bb7b..f08b2b84f525bc53627056fbf86710c65002babe 100644 (file)
--- a/gcc/testsuite/gcc.dg/pr102892-1.c
+++ b/gcc/testsuite/gcc.dg/pr102892-1.c
@@ -1,5 +1,6 @@
 /* { dg-do link } */
 /* { dg-options "-O3" } */
+/* { dg-additional-options "-fno-PIC" { target ia32 } } */
 /* { dg-additional-sources "pr102892-2.c" } */
 
 static long b[2][1] = {0};

diff --git a/gcc/testsuite/gcc.dg/sibcall-11.c b/gcc/testsuite/gcc.dg/sibcall-11.c
index ae5877082363ea9e653d39cf7daaf681f480a93b..12f6d9c9c34ea61aa1df747f26844e40281dfba4 100644 (file)
--- a/gcc/testsuite/gcc.dg/sibcall-11.c
+++ b/gcc/testsuite/gcc.dg/sibcall-11.c
@@ -1,5 +1,6 @@
 // Test for sibcall optimization with empty struct.
 // { dg-options "-O2" }
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 // { dg-final { scan-assembler "jmp" { target i?86-*-* x86_64-*-* } } }
 
 struct A { };

diff --git a/gcc/testsuite/gcc.dg/torture/builtin-self.c b/gcc/testsuite/gcc.dg/torture/builtin-self.c
index 6d1719f7517d9c5268b73686109c9b119e67d7b5..56188fcc468a9a452299670e504552b597471284 100644 (file)
--- a/gcc/testsuite/gcc.dg/torture/builtin-self.c
+++ b/gcc/testsuite/gcc.dg/torture/builtin-self.c
@@ -1,4 +1,5 @@
 /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* Check that we can use this idiom to define out-of-line copies of built-in
    functions.  This is used by libgcc/sync.c, for example.  */
 void __sync_synchronize (void)

diff --git a/gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c b/gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c
index 787b1d08f804e6593eb7ef4dff10cd442f269027..fe331fe5e2c37d28cd70157944bbe4c08b06b1e7 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c
+++ b/gcc/testsuite/gcc.target/i386/avx2-dest-false-dep-for-glc.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx2 -mtune=generic -mtune-ctrl=dest_false_dep_for_glc -O2" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 
 #include <immintrin.h>

diff --git a/gcc/testsuite/gcc.target/i386/avx512bf16-cvtsbh2ss-1.c b/gcc/testsuite/gcc.target/i386/avx512bf16-cvtsbh2ss-1.c
index bf29a69a5b5ee114344bcab0aefa2739b1601a32..831abd37d8073c22878cb9d7b1403330f120bab4 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512bf16-cvtsbh2ss-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bf16-cvtsbh2ss-1.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512bf16 -O2" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final { scan-assembler-times "sall\[ \\t\]+\[^\{\n\]*16" 1 } } */
 /* { dg-final { scan-assembler-times "movl" 1 } } */
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-1.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-1.c
index a2664d87f2982720fa89433ab61b7f3171ee217d..0fa93e031359ea5dd84cb8331fba1187010386e2 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-1.c
@@ -1,6 +1,7 @@
 /* PR target/87767 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512f -mavx512dq" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } }
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 2 { target { ! ia32 } } } }  */
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 5 { target ia32 } } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-3.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-3.c
index e57a5682c31118db7b96cbb3951a5d20b1d98264..b1a75f22daf5730a6fd793100c49c9519de3083a 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-3.c
@@ -1,6 +1,7 @@
 /* PR target/87767 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512f" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } }
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 4 } }  */
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to16\\\}" 4 } }  */

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-5.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-5.c
index 477f9ca128220670f6cc1cbdd14a8bfb9d73fa38..f1b672aba4db091c5dc86e85c85309488bc6a5c8 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-5.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-5.c
@@ -1,6 +1,7 @@
 /* PR target/87767 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512f" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } }
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 4 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %zmm\[0-9\]+" 4 } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-7.c b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-7.c
index 194d888093b9e98905247851db5463f519e947e6..1f141d0f8061d6bf4bf700ace329995f43d40454 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-7.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-broadcast-pr87767-7.c
@@ -1,6 +1,7 @@
 /* PR target/87767 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512f -mavx512vl" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } }
 /* { dg-final { scan-assembler-times "vadd\[^\n\]*\\\{1to2\\\}" 1 } }  */
 /* { dg-final { scan-assembler-times "vadd\[^\n\]*\\\{1to4\\\}" 2 } }  */

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-broadcast-1.c b/gcc/testsuite/gcc.target/i386/avx512fp16-broadcast-1.c
index 3e2397f066f86da2feb4afc87162ea26cd65163f..1e9b8f3cad6be63d9948cb97477a7f9b841fd38f 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-broadcast-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-broadcast-1.c
@@ -1,6 +1,7 @@
 /* PR target/87767 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } }
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to8\\\}" 4 } }  */
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to16\\\}" 4 } }  */

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-pr101846.c b/gcc/testsuite/gcc.target/i386/avx512fp16-pr101846.c
index abd91561785c059bc8c65bb49e2a90bf958fa809..01571d21e3d0fca2f35ab2333b515cafaa477467 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-pr101846.c
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-pr101846.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final { scan-assembler-times "vpmovzxwd" "3" } } */
 /* { dg-final { scan-assembler-times "vpmovdw" "3" } } */
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c
index f29c953572d76f214ce585c64a2b67c798873263..7200f291b1e565f2edca6e20b0ea616f90b2ef2b 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2si-1a.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512fp16 -O2" } */
-/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsh2si\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */
 
 
 #include <immintrin.h>

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c
index 7d00867247e91fad74fc5a2538903e385ecd3e37..0d00803c7304bdf4f55ae4451b6a89818392b799 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvtsh2usi-1a.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512fp16 -O2" } */
-/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
-/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtsh2usi\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */
 
 
 #include <immintrin.h>

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1a.c
index 80d84fce1534d1b88f55e240081afa9a59ddddaa..4fb0684d6623a283d46fe5a11fd5af4f37ede7d6 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1a.c
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2si-1a.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512fp16 -O2" } */
-/* { dg-final { scan-assembler-times "vcvttsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttsh2si\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttsh2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttsh2si\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */
 
 #include <immintrin.h>
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c
index 59564578a4d5fc1e2e05838f7a286dc08ddcffe4..3d408f13d095380a76043aa5b711fed1f3313fc4 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vcvttsh2usi-1a.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512fp16 -O2" } */
-/* { dg-final { scan-assembler-times "vcvttsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
-/* { dg-final { scan-assembler-times "vcvttsh2usi\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%eax" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttsh2usi\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttsh2usi\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%e\[ad]x" 1 } } */
 
 #include <immintrin.h>
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c
index e35be10fcd0ec1a52e46ea7c760593e3aae036b3..ba10096aa200d14cdff0aec12a3b44fd6cd5dc14 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c
@@ -1,8 +1,8 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512fp16 -O2" } */
-/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r\]*%\[er\]ax+\[^\n\r]*\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]ax+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]ax+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^z\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-1.c
index f8eb99f0b5fe20f6ed3c673a2bcfba339d164dbd..0304b9de3a3c3062f8c09fe2e70a6d6a2af5850c 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-1.c
@@ -1,6 +1,7 @@
 /* PR target/87767 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512f -mavx512vl -mavx512dq" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } }
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to2\\\}" 2 { target { ! ia32 } } } }  */
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to4\\\}" 4 { target { ! ia32 } } } }  */

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-3.c b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-3.c
index 3b27def147d0af7636505907f44c7070ae188fd2..8ad8fd75b1ab3b40a5a66dcb264beef6937ac496 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-3.c
@@ -1,6 +1,7 @@
 /* PR target/87767 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512f -mavx512vl" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } }
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to2\\\}" 4 } }  */
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to4\\\}" 8 } }  */

diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-5.c b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-5.c
index 32f6ac81841c44d2178fc6ec3942821b904aaee5..0ba0cd943c2c7a4ce67881d9b862c4c4cc730c85 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-5.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-broadcast-pr87767-5.c
@@ -1,6 +1,7 @@
 /* PR target/87767 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512f -mavx512vl" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } }
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to2\\\}" 4 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "\[^\n\]*\\\{1to4\\\}" 4 { target ia32 } } } */

diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-6a.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-6a.c
index c3d0eb929424d116bbc7575ba897da92b7aae403..6cc88ad436fe031bf757bbe0c67143c647c0e1cb 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/cet-sjlj-6a.c
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-6a.c
@@ -2,10 +2,8 @@
 /* { dg-require-effective-target maybe_x32 } */
 /* { dg-options "-O -maddress-mode=short -fcf-protection -mx32" } */
 /* { dg-final { scan-assembler-times "endbr64" 2 } } */
-/* { dg-final { scan-assembler-times "movq\t\[^\n\]*buf\\+8" 1 { target nonpic } } } */
-/* { dg-final { scan-assembler-times "movq\t\[^\n\]*8\\+buf" 1 { target { ! nonpic } } } } */
-/* { dg-final { scan-assembler-times "subq\tbuf\\+8" 1 { target nonpic } } } */
-/* { dg-final { scan-assembler-times "subq\t8\\+buf" 1 { target { ! nonpic } } } } */
+/* { dg-final { scan-assembler-times "movq\t\[^\n\]*(?:8\\+buf|buf\\+8)" 1 } } */
+/* { dg-final { scan-assembler-times "subq\t(?:8\\+buf|buf\\+8)" 1 } } */
 /* { dg-final { scan-assembler-times "shrl\t\\\$3," 1 } } */
 /* { dg-final { scan-assembler-times "rdsspq" 2 } } */
 /* { dg-final { scan-assembler-times "incsspq" 2 } } */

diff --git a/gcc/testsuite/gcc.target/i386/cet-sjlj-6b.c b/gcc/testsuite/gcc.target/i386/cet-sjlj-6b.c
index 4c52685d7d1e1f87d2bacd52567243a3c576a72a..b80acfdfdf80d39dea1cc1668662d9923409b38d 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/cet-sjlj-6b.c
+++ b/gcc/testsuite/gcc.target/i386/cet-sjlj-6b.c
@@ -2,10 +2,8 @@
 /* { dg-require-effective-target maybe_x32 } */
 /* { dg-options "-O -maddress-mode=long -fcf-protection -mx32" } */
 /* { dg-final { scan-assembler-times "endbr64" 2 } } */
-/* { dg-final { scan-assembler-times "movq\t\[^\n\]*buf\\+16" 1 { target nonpic } } } */
-/* { dg-final { scan-assembler-times "movq\t\[^\n\]*16\\+buf" 1 { target { ! nonpic } } } } */
-/* { dg-final { scan-assembler-times "subq\tbuf\\+16" 1 { target nonpic } } } */
-/* { dg-final { scan-assembler-times "subq\t16\\+buf" 1 { target { ! nonpic } } } } */
+/* { dg-final { scan-assembler-times "movq\t\[^\n\]*(?:16\\+buf|buf\\+16)" 1 } } */
+/* { dg-final { scan-assembler-times "subq\t(?:16\\+buf|buf\\+16)" 1 } } */
 /* { dg-final { scan-assembler-times "shrl\t\\\$3," 1 } } */
 /* { dg-final { scan-assembler-times "rdsspq" 2 } } */
 /* { dg-final { scan-assembler-times "incsspq" 2 } } */

diff --git a/gcc/testsuite/gcc.target/i386/interrupt-11.c b/gcc/testsuite/gcc.target/i386/interrupt-11.c
index ded589e0cd0d7d99a71487ea20feba7da68f7a22..4a119b9748afe7cd41ab009128a5d852d904f493 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/interrupt-11.c
+++ b/gcc/testsuite/gcc.target/i386/interrupt-11.c
@@ -15,7 +15,7 @@ foo (void *frame)
 /* { dg-final { scan-assembler-not "kmov.\[\\t \]*\[0-9\]*\\(%\[re\]?sp\\),\[\\t \]*%k\[0-7\]+" } } */
 /* { dg-final { scan-assembler-not "pushq\[\\t \]*%rbx" { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler-not "pushq\[\\t \]*%r1\[2-5\]+" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-not "pushl\[\\t \]*%ebx" { target ia32 } } } */
+/* { dg-final { scan-assembler-not "pushl\[\\t \]*%ebx" { target { ia32 && nonpic } } } } */
 /* { dg-final { scan-assembler-not "pushl\[\\t \]*%edi" { target ia32 } } } */
 /* { dg-final { scan-assembler-not "pushl\[\\t \]*%esi" { target ia32 } } } */
 /* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:e|r)ax" 1 } } */

diff --git a/gcc/testsuite/gcc.target/i386/interrupt-12.c b/gcc/testsuite/gcc.target/i386/interrupt-12.c
index 078bbcf779862f109da00e41c463c585a8e513b3..4e91a27de43b33451718fdf9245522022e872608 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/interrupt-12.c
+++ b/gcc/testsuite/gcc.target/i386/interrupt-12.c
@@ -12,7 +12,8 @@ fn1 (void *frame, uword_t error)
 }
 
 /* { dg-final { scan-assembler-not "movups\[\\t .\]*%(x|y|z)mm\[0-9\]+" } } */
-/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(b|c|d)x" } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bx" { target { nonpic || { ! ia32 } } } } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(c|d)x" } } */
 /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */
 /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */
 /* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%rax" { target { { ! ia32 } &&  nonpic } } } } */
@@ -20,7 +21,8 @@ fn1 (void *frame, uword_t error)
 /* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 1 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "leave" 1 { target { ia32 && nonpic } } } } */
 /* { dg-final { scan-assembler-times "pushl\[\\t \]*%eax" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target { ia32 && nonpic } } } } */
+/* { dg-final { scan-assembler-times "popl\[\\t \]*%eax" 1 { target { ia32 && { ! nonpic } } } } } */
 /* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler "(addl|leal).*4.*%esp" { target ia32 } } } */

diff --git a/gcc/testsuite/gcc.target/i386/interrupt-13.c b/gcc/testsuite/gcc.target/i386/interrupt-13.c
index 77ee3a510701adc0bc4fd71dc8ecd5257a83c112..4afd1b03dac2e03ad58f273d07fcbc7198d13b03 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/interrupt-13.c
+++ b/gcc/testsuite/gcc.target/i386/interrupt-13.c
@@ -12,7 +12,8 @@ fn1 (void *frame, uword_t error)
 }
 
 /* { dg-final { scan-assembler-not "movups\[\\t .\]*%(x|y|z)mm\[0-9\]+" } } */
-/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(b|c|d)x" } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bx" { target { nonpic || { ! ia32 } } } } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(c|d)x" } } */
 /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */
 /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */
 /* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%rax" { target { { ! ia32 } && nonpic } } } } */
@@ -20,7 +21,8 @@ fn1 (void *frame, uword_t error)
 /* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 1 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "leave" 1 { target { ia32 && nonpic } } } } */
 /* { dg-final { scan-assembler-times "pushl\[\\t \]*%eax" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 1 { target { ia32 && nonpic } } } } */
+/* { dg-final { scan-assembler-times "popl\[\\t \]*%eax" 1 { target { ia32 && { ! nonpic } } } } } */
 /* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 1 { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler "(addl|leal).*4.*%esp" { target ia32 } } } */

diff --git a/gcc/testsuite/gcc.target/i386/interrupt-15.c b/gcc/testsuite/gcc.target/i386/interrupt-15.c
index 2a0d260cfe6ae9c10997b7bb65f1daa184a6c011..f43aabc90dde6e4071fd31c3827a9c6062cbff99 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/interrupt-15.c
+++ b/gcc/testsuite/gcc.target/i386/interrupt-15.c
@@ -19,7 +19,8 @@ fn2 (void *frame, uword_t error)
 }
 
 /* { dg-final { scan-assembler-not "movups\[\\t .\]*%(x|y|z)mm\[0-9\]+" } } */
-/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(b|c|d)x" } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)ax" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(c|d)x" } } */
 /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */
 /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */
 /* { dg-final { scan-assembler-not "(push|pop)q\[\\t \]*%rax" { target { { ! ia32 } && nonpic } } } } */
@@ -27,7 +28,7 @@ fn2 (void *frame, uword_t error)
 /* { dg-final { scan-assembler-times "pushl\[\\t \]*%ebp" 2 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "leave" 2 { target { ia32 && nonpic } } } } */
 /* { dg-final { scan-assembler-times "pushl\[\\t \]*%eax" 2 { target ia32 } } } */
-/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 2 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "movl\[\\t \]*-4\\(%ebp\\),\[\\t \]*%eax" 2 { target { ia32 && nonpic } } } } */
 /* { dg-final { scan-assembler-times "pushq\[\\t \]*%rdi" 2 { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler-times "popq\[\\t \]*%rdi" 2 { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler "(addl|leal).*4.*%esp" { target ia32 } } } */

diff --git a/gcc/testsuite/gcc.target/i386/interrupt-16.c b/gcc/testsuite/gcc.target/i386/interrupt-16.c
index bc929c657a21f28f215288c08bc7129efbcd5659..cb45ba54e3dced77b10121fd891fbfd874310541 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/interrupt-16.c
+++ b/gcc/testsuite/gcc.target/i386/interrupt-16.c
@@ -12,7 +12,8 @@ foo (int i)
 
 /* { dg-final { scan-assembler-not "movups\[\\t \]*%(x|y|z)mm\[0-9\]+,\[\\t \]-*\[0-9\]*\\(%\[re\]?bp\\)" } } */
 /* { dg-final { scan-assembler-not "movups\[\\t \]*-\[0-9\]*\\(%\[re\]?bp\\),\[\\t \]*%(x|y|z)mm\[0-9\]+" } } */
-/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(a|b|c|d)x" } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bx" { target { nonpic || { ! ia32 } } } } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(a|c|d)x" } } */
 /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */
 /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bp" } } */
 /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */

diff --git a/gcc/testsuite/gcc.target/i386/interrupt-17.c b/gcc/testsuite/gcc.target/i386/interrupt-17.c
index 5d5b59e2890972f37a25736ae59439b326aa7056..218ed60854a911dd5980e62d64e6913ca479b853 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/interrupt-17.c
+++ b/gcc/testsuite/gcc.target/i386/interrupt-17.c
@@ -11,7 +11,8 @@ foo (int i)
 }
 
 /* { dg-final { scan-assembler-not "movups\[\\t \]*%(x|y|z)mm\[0-9\]+" } } */
-/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(a|b|c|d)x" } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bx" { target { nonpic || { ! ia32 } } } } } */
+/* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)(a|c|d)x" } } */
 /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)si" } } */
 /* { dg-final { scan-assembler-not "(push|pop)(l|q)\[\\t \]*%(r|e)bp" } } */
 /* { dg-final { scan-assembler-not "(push|pop)l\[\\t \]*%edi" { target ia32 } } } */

diff --git a/gcc/testsuite/gcc.target/i386/interrupt-8.c b/gcc/testsuite/gcc.target/i386/interrupt-8.c
index 34536d135eeebf282051f40d1002f1b8439a37f0..039ccd57f88e2c5e9ed97f1875dfdb4914a02486 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/interrupt-8.c
+++ b/gcc/testsuite/gcc.target/i386/interrupt-8.c
@@ -15,7 +15,7 @@ foo (void *frame)
 /* { dg-final { scan-assembler-not "kmov.\[\\t \]*\[0-9\]*\\(%\[re\]?sp\\),\[\\t \]*%k\[0-7\]+" } } */
 /* { dg-final { scan-assembler-not "pushq\[\\t \]*%rbx" { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler-not "pushq\[\\t \]*%r1\[2-5\]+" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-not "pushl\[\\t \]*%ebx" { target ia32 } } } */
+/* { dg-final { scan-assembler-not "pushl\[\\t \]*%ebx" { target { ia32 && nonpic } } } } */
 /* { dg-final { scan-assembler-not "pushl\[\\t \]*%e(s|d)i" { target ia32 } } } */
 /* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:e|r)ax" 1 } } */
 /* { dg-final { scan-assembler-times "push(?:l|q)\[\\t \]*%(?:e|r)cx" 1 } } */

diff --git a/gcc/testsuite/gcc.target/i386/pad-10.c b/gcc/testsuite/gcc.target/i386/pad-10.c
index 3d003a8a8632aca5768447f4cd53b566ab4a34f1..ac015f222c1d05c1889663c4f3ad8bb81f726231 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pad-10.c
+++ b/gcc/testsuite/gcc.target/i386/pad-10.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-skip-if "" { *-*-* } { "-march=*" } { "-march=atom" } } */
 /* { dg-options "-O2 -fomit-frame-pointer -march=atom" } */
-/* { dg-final { scan-assembler-not "nop" } } */
+/* { dg-final { scan-assembler-not "nop" { target { nonpic || { ! ia32 } } } } } */
 /* { dg-final { scan-assembler-not "rep" } } */
 
 extern void bar ();

diff --git a/gcc/testsuite/gcc.target/i386/pr100704-3.c b/gcc/testsuite/gcc.target/i386/pr100704-3.c
index 65f9745a197f440600764711af9e958a6fa98b5d..6f7a3e59ecff5509972e48415ebb5f3768625a91 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100704-3.c
+++ b/gcc/testsuite/gcc.target/i386/pr100704-3.c
@@ -17,4 +17,6 @@ foo (void)
   bar (1, 2, 3, 4, 5, 6, foooo[0]);
 }
 
-/* { dg-final { scan-assembler "push\[lq\]\tfoooo\+" } } */
+/* { dg-final { scan-assembler "push\[lq\]\tfoooo\+" { target { nonpic || { ! ia32 } } } } }*/
+/* { dg-final { scan-assembler "movl\tfoooo@GOT\\(%ebx\\), %eax" { target { ia32 && { ! nonpic } } } } } */
+/* { dg-final { scan-assembler-times "pushl\t(?:|4|8|12)\\(%eax\\)" 4 { target { ia32 && { ! nonpic } } } } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-2.c b/gcc/testsuite/gcc.target/i386/pr100865-2.c
index f3ea7753abe8bfc9fc8c2326bb08d095570990e4..090a010b719d458895e2dfcbe1f6b34e33b2e07c 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-2.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -march=skylake" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 extern char *dst;
 

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-3.c b/gcc/testsuite/gcc.target/i386/pr100865-3.c
index 714c43e12c9b45bf4ed21ed80adf3326483e9b90..cde4b1c8927b7c1ee457f140ccf6a3b227c0ae09 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-3.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-3.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -march=skylake-avx512" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 extern char *dst;
 

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-4a.c b/gcc/testsuite/gcc.target/i386/pr100865-4a.c
index 8609d1128b8dd6178253e576dfe18f7e198bf76b..bd99945fd9dbe8c17e59fe20c022dca238787ebf 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-4a.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-4a.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -march=skylake -mtune-ctrl=avx256_store_by_pieces" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 extern char array[64];
 

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-4b.c b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
index 6d9cb91b8e9bf48e55a7139b2817f85a53ec4676..1814306d5fc31f8cfc6bd227ef2d2bbbd50850e5 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-4b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-4b.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -march=skylake-avx512" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 #include "pr100865-4a.c"
 

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-5a.c b/gcc/testsuite/gcc.target/i386/pr100865-5a.c
index 4149797fe816bfd86b3523cb9483e9a7ae4e0265..b023fcae0ad4f9c121071cf0488599dcfe218dcd 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-5a.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-5a.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=skylake" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 extern short array[64];
 

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-5b.c b/gcc/testsuite/gcc.target/i386/pr100865-5b.c
index ded41b680d351a1ec0966e09366b0c5f7153e463..5bccfd0de9fd5d499dd610c104b6c1cc19995bf9 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-5b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-5b.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=skylake-avx512" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 #include "pr100865-5a.c"
 

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6a.c b/gcc/testsuite/gcc.target/i386/pr100865-6a.c
index 3fde549a10dc22e96946cdc40af4a9ef1fc2c036..34951a9c96891722b328776459d36c35b73624bd 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-6a.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-6a.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=skylake" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 extern int array[64];
 

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6b.c b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
index 9588249cb02c7234e92db20e6e661c1a6b2d3754..09b0e71d9120c4dd46df05b1a7d136bb697c15fa 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-6b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-6b.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=skylake-avx512" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 #include "pr100865-6a.c"
 

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-6c.c b/gcc/testsuite/gcc.target/i386/pr100865-6c.c
index 46d31030ce8512de49cf01ae9571a94827f54b32..bab7c88d89c17a6ed9014d88fa5c90ed86c11772 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-6c.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-6c.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=skylake -mno-avx2" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 extern int array[64];
 

diff --git a/gcc/testsuite/gcc.target/i386/pr100865-7b.c b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
index 3b20c6805213eaa8e7a908cf3461bea17f00e388..49f752e1f241bb5f83786527f23f4b225ffd4fb4 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr100865-7b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-7b.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=skylake-avx512" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 #include "pr100865-7a.c"
 

diff --git a/gcc/testsuite/gcc.target/i386/pr101796-1.c b/gcc/testsuite/gcc.target/i386/pr101796-1.c
index 3a5f50dbedab392bee7491327952e709b8a2f2aa..b25464ddb8722aefaa945db634dcc181282a8454 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr101796-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr101796-1.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512bw" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final {scan-assembler-times "vpsrlw\[ \\t\]" 1 } } */
 /* { dg-final {scan-assembler-times "vpsllw\[ \\t\]" 1 } } */
 /* { dg-final {scan-assembler-times "vpsraw\[ \\t\]" 1 } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr101846-2.c b/gcc/testsuite/gcc.target/i386/pr101846-2.c
index 26c9ed511e5657e3ac5ad01d86b92959e07345e8..bc2b466262dfbf2b321eb866e740f2779763fc1a 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr101846-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr101846-2.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512vl -mavx512vbmi -O2" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final { scan-assembler-times "vpmovwb" "3" } } */
 /* { dg-final { scan-assembler-times "vpmovdw" "3" } } */
 /* { dg-final { scan-assembler-times "vpmovqd" "3" } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr101989-broadcast-1.c b/gcc/testsuite/gcc.target/i386/pr101989-broadcast-1.c
index d03d192915f6e7df70be39e25f5701f31fda0b02..428c40c49dba14bc2f19d6db8cc628f7ce9de5a5 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr101989-broadcast-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr101989-broadcast-1.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -mavx512vl" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final { scan-assembler-times "vpternlog" 4 } } */
 /* { dg-final { scan-assembler-times "\\\{1to4\\\}" 4 } } */
 #include<immintrin.h>

diff --git a/gcc/testsuite/gcc.target/i386/pr102021.c b/gcc/testsuite/gcc.target/i386/pr102021.c
index 6db3f57dc761f422c6df6a23272304927f08c783..a5012a4beb10c3f43c4413f903442fdd444e2f31 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr102021.c
+++ b/gcc/testsuite/gcc.target/i386/pr102021.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O3 -march=skylake-avx512" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 #include<immintrin.h>
 

diff --git a/gcc/testsuite/gcc.target/i386/pr15184-1.c b/gcc/testsuite/gcc.target/i386/pr15184-1.c
index 8c19e47585250cc80e99315f734c2ea4287c7cca..756183de987dc197452661ce0cfa07ad821a80b7 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr15184-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr15184-1.c
@@ -1,6 +1,7 @@
 /* PR 15184 first two tests, plus two addition ones.  */
 /* { dg-do compile { target ia32 } } */
 /* { dg-options "-O2 -march=pentiumpro" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 #define regparm __attribute__((__regparm__(1)))
 

diff --git a/gcc/testsuite/gcc.target/i386/pr15184-2.c b/gcc/testsuite/gcc.target/i386/pr15184-2.c
index a6cb9ebc24eb374b9a25aa79235fa17a04109f42..cb8201f9731f0f9658848416b8bd56fc5c26aa33 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr15184-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr15184-2.c
@@ -1,6 +1,7 @@
 /* PR 15184 second two tests
 /* { dg-do compile { target ia32 } } */
 /* { dg-options "-O2 -march=pentiumpro" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 #define regparm __attribute__((__regparm__(1)))
 

diff --git a/gcc/testsuite/gcc.target/i386/pr27971.c b/gcc/testsuite/gcc.target/i386/pr27971.c
index f80cb6502fdd1d7b0bdf79d418d8cef5cae9d575..19eb3548d87f196e57398c1c8717590ed7e9ad4b 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr27971.c
+++ b/gcc/testsuite/gcc.target/i386/pr27971.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -mno-tbm" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-additional-options "-mdynamic-no-pic" { target { *-*-darwin* && ia32 } } } */
 
 unsigned array[4];
@@ -17,4 +18,3 @@ unsigned foo(TYPE x)
 
 /* { dg-final { scan-assembler-not "shr\[^\\n\]*2" } } */
 /* { dg-final { scan-assembler "and\[^\\n\]*12" } } */
- 
\ No newline at end of file

diff --git a/gcc/testsuite/gcc.target/i386/pr54855-3.c b/gcc/testsuite/gcc.target/i386/pr54855-3.c
index 3c15dfc93d11016a6057106bd3d902c07865fe27..a58a8ba534767df3be9cf0d5cbc8e080e5f83ed1 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr54855-3.c
+++ b/gcc/testsuite/gcc.target/i386/pr54855-3.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -msse2 -mfpmath=sse" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final { scan-assembler-times "subsd" 1 } } */
 /* { dg-final { scan-assembler-not "movapd" } } */
 /* { dg-final { scan-assembler-not "movsd" } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr54855-7.c b/gcc/testsuite/gcc.target/i386/pr54855-7.c
index a551bd5c92f9e125e693ee941183b218ef99da38..d9ef66a3b44ac2905bfe5bfa7c445cf84d800816 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr54855-7.c
+++ b/gcc/testsuite/gcc.target/i386/pr54855-7.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -msse -mfpmath=sse" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final { scan-assembler-times "divss" 1 } } */
 /* { dg-final { scan-assembler-not "movaps" } } */
 /* { dg-final { scan-assembler-not "movss" } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr70263-2.c b/gcc/testsuite/gcc.target/i386/pr70263-2.c
index 19f79fd0e3673e42cae3921ba82541887132bb8c..20447ede517c6350764b6f14cf0d286c8fdbf12b 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr70263-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr70263-2.c
@@ -1,5 +1,8 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -fdump-rtl-ira" } */
+/* ia32 PIC prevents tail-calling, which forces bar's arg to be pushed, which
+   drops the equivalence.  */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 /* { dg-final { scan-rtl-dump "Adding REG_EQUIV to insn \[0-9\]+ for source of insn \[0-9\]+" "ira" } } */
 

diff --git a/gcc/testsuite/gcc.target/i386/pr70321.c b/gcc/testsuite/gcc.target/i386/pr70321.c
index eaba7285ccf6517a8b37105909f8708827096248..57552efe7a27921c6bed4e7221fe45983d486d3f 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr70321.c
+++ b/gcc/testsuite/gcc.target/i386/pr70321.c
@@ -7,4 +7,6 @@ void foo (long long ixi)
     __builtin_abort ();
 }
 
-/* { dg-final { scan-assembler-times "mov" 1 } } */
+/* { dg-final { scan-assembler-times "mov" 1 { target nonpic } } } */
+/* get_pc_thunk adds an extra mov insn.  */
+/* { dg-final { scan-assembler-times "mov" 2 { target { ! nonpic } } } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr78035.c b/gcc/testsuite/gcc.target/i386/pr78035.c
index 2e673a8ce2d7c89b4fc626dd157c1532cfa1593c..7d3a983b2188fa8394ae4dfa9170055a208192de 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr78035.c
+++ b/gcc/testsuite/gcc.target/i386/pr78035.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 extern int a;
 extern int b;

diff --git a/gcc/testsuite/gcc.target/i386/pr81563.c b/gcc/testsuite/gcc.target/i386/pr81563.c
index f0efcf91340143b9faaff875999f9f171c47b42b..3d3f95944b8ddecbf1cf361eee54c4f97347e5c5 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr81563.c
+++ b/gcc/testsuite/gcc.target/i386/pr81563.c
@@ -10,4 +10,4 @@ fn1 (long long int x)
   return x;
 }
 
-/* { dg-final { scan-assembler-not "movl\[ \\t\]+\[0-9]*\\(%esp\\)" } } */
+/* { dg-final { scan-assembler-not "movl\[ \\t\]+\[0-9]+\\(%esp\\)" } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr81736-5.c b/gcc/testsuite/gcc.target/i386/pr81736-5.c
index e1602cf25ba9fddc096d6045f2f8588e8723560a..0dcf17b98a2a68ecd7a38ed3f280da5fc24ef3bf 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr81736-5.c
+++ b/gcc/testsuite/gcc.target/i386/pr81736-5.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -fno-omit-frame-pointer -mavx" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 typedef int v8si __attribute__ ((vector_size (32)));
 

diff --git a/gcc/testsuite/gcc.target/i386/pr81736-7.c b/gcc/testsuite/gcc.target/i386/pr81736-7.c
index f947886e64273091a06c22a957529c7cebf376c6..95b380d238b2e220758630b46278d0239df99238 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr81736-7.c
+++ b/gcc/testsuite/gcc.target/i386/pr81736-7.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -fno-omit-frame-pointer" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 extern int foo (void);
 

diff --git a/gcc/testsuite/gcc.target/i386/pr84278.c b/gcc/testsuite/gcc.target/i386/pr84278.c
index d100dff198455848ca7fb8d923297ed2538450c8..2fa84802c6790d849be3879cf95eda0f82276237 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr84278.c
+++ b/gcc/testsuite/gcc.target/i386/pr84278.c
@@ -15,4 +15,6 @@ void foo(void)
     }
 }
 
-/* { dg-final { scan-assembler-not "\\\(%.sp\\\)" } } */
+/* { dg-final { scan-assembler-not "\\\(%.sp\\\)" { target { nonpic || { ! ia32 } } } } } */
+/* ia32's get_pc_thunk variants all load from %(esp).  */
+/* { dg-final { scan-assembler-times "movl\[ \t]*\\\(%.sp\\\)" 1 { target { ! { nonpic || { ! ia32 } } } } } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr85620-6.c b/gcc/testsuite/gcc.target/i386/pr85620-6.c
index 0b6a64e8454b83a5fd92dd3dc67738dc24eca882..4f04ba0e49141425fe412ba848220a58148b4023 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr85620-6.c
+++ b/gcc/testsuite/gcc.target/i386/pr85620-6.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -fcf-protection" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final { scan-assembler "jmp" } } */
 
 struct ucontext;

diff --git a/gcc/testsuite/gcc.target/i386/pr85667-6.c b/gcc/testsuite/gcc.target/i386/pr85667-6.c
index 5d2c66e7f97ce48ac81c633b37230dff9a595c77..06570dd64608f21a833baffdf19eb8646c08dc51 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr85667-6.c
+++ b/gcc/testsuite/gcc.target/i386/pr85667-6.c
@@ -1,5 +1,6 @@
 /* { dg-do compile { target ia32 } } */
 /* { dg-options "-O2" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final { scan-assembler-times "movl\[^\n\r]*, %eax" 1 } } */
 /* { dg-final { scan-assembler-times "flds\[^\n\r]*" 1 } } */
 typedef struct

diff --git a/gcc/testsuite/gcc.target/i386/pr90773-17.c b/gcc/testsuite/gcc.target/i386/pr90773-17.c
index 570748366f87af5ebb89e7fdf16b494ad4791ecd..3036085b7bf774b02692a13033352b615f989ddb 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr90773-17.c
+++ b/gcc/testsuite/gcc.target/i386/pr90773-17.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -march=skylake-avx512" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 extern char *dst;
 

diff --git a/gcc/testsuite/gcc.target/i386/pr90773-2.c b/gcc/testsuite/gcc.target/i386/pr90773-2.c
index 64495751b46406daf1c23bdd910d0b9a0bfb79d9..b5373ca8c0d6afd5802e9adb3a4f5e5c22e4a93d 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr90773-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr90773-2.c
@@ -13,7 +13,10 @@ foo (void)
 
 /* { dg-final { scan-assembler-times "movdqu\[\\t \]+\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler-times "movl\[\\t \]+15\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 1 { target ia32 } } } */
+/* PIC gets one extra match in get_pc_thunk, and two extra matches to load
+   dst's and src's values after loading their addresses from the GOT.  */
+/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 1 { target { ia32 && nonpic } } } } */
+/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 4 { target { ia32 && { ! nonpic } } } } } */
 /* { dg-final { scan-assembler-times "movl\[\\t \]+4\\(%\[\^,\]+\\)," 1 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "movl\[\\t \]+8\\(%\[\^,\]+\\)," 1 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "movl\[\\t \]+12\\(%\[\^,\]+\\)," 1 { target ia32 } } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr90773-3.c b/gcc/testsuite/gcc.target/i386/pr90773-3.c
index 84747c94652563c5cd2bcb0930a82ad5a16761ef..dd2430f0bbbf7cbd741d09cfc1d4e05a4612396d 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr90773-3.c
+++ b/gcc/testsuite/gcc.target/i386/pr90773-3.c
@@ -13,7 +13,10 @@ foo (void)
 
 /* { dg-final { scan-assembler-times "movdqu\[\\t \]+\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler-times "movdqu\[\\t \]+15\\(%\[\^,\]+\\)," 1 { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 1 { target ia32 } } } */
+/* PIC gets one extra match in get_pc_thunk, and two extra matches to load
+   dst's and src's values after loading their addresses from the GOT.  */
+/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 1 { target { ia32 && nonpic } } } } */
+/* { dg-final { scan-assembler-times "movl\[\\t \]+\\(%\[\^,\]+\\)," 4 { target { ia32 && { ! nonpic } } } } } */
 /* { dg-final { scan-assembler-times "movl\[\\t \]+4\\(%\[\^,\]+\\)," 1 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "movl\[\\t \]+8\\(%\[\^,\]+\\)," 1 { target ia32 } } } */
 /* { dg-final { scan-assembler-times "movl\[\\t \]+12\\(%\[\^,\]+\\)," 1 { target ia32 } } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr93492-5.c b/gcc/testsuite/gcc.target/i386/pr93492-5.c
index 5aebb3847f5bebbabb6bf41a8d7419bc068c9bc2..1ca5ba1fac16c46ff8b93b776c920d6b584f52cc 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr93492-5.c
+++ b/gcc/testsuite/gcc.target/i386/pr93492-5.c
@@ -1,5 +1,6 @@
 /* { dg-do "compile" { target *-*-linux* } } */
 /* { dg-options "-O1 -fpatchable-function-entry=1 -mfentry -pg -fasynchronous-unwind-tables" } */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 /* Test the placement of the .LPFE1 label.  */
 

diff --git a/gcc/testsuite/gcc.target/i386/pr94913-2.c b/gcc/testsuite/gcc.target/i386/pr94913-2.c
index 22bca2bf27b66b7ee342b6e6518ea75093d4fc1d..199f3fe7a0168143fb9e4fb082d98ed3bd14f4ab 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr94913-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr94913-2.c
@@ -21,4 +21,8 @@ void fooi (unsigned long x, unsigned long y)
 }
 
 /* { dg-final { scan-assembler-not "cmp" } } */
-/* { dg-final { scan-assembler-times "add" 3 } } */
+/* On IA32, PIC adds one add per function to compute the PIC register, and
+   another add to adjust %esp in the epilogue needed to restore the PIC
+   register.  */
+/* { dg-final { scan-assembler-times "add" 3 { target { ! { ia32 && { ! nonpic } } } } } } */
+/* { dg-final { scan-assembler-times "add" 9 { target { ia32 && { ! nonpic } } } } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr95126-m32-1.c b/gcc/testsuite/gcc.target/i386/pr95126-m32-1.c
index 1d6acd66df66e8ffb05549088c6f70d7d3d40261..9dfe15d7efe37b6923e60817ec22701c5153b9c3 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr95126-m32-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr95126-m32-1.c
@@ -10,7 +10,8 @@ void call_func(void)
     func(s);
 }
 
-/* { dg-final { scan-assembler "movl\[ \\t]*\\\$" } } */
-/* { dg-final { scan-assembler "movb\[ \\t]*\\\$0, " } } */
-/* { dg-final { scan-assembler-not "movzwl" } } */
-
+/* The @GOTOFF addressing seems to prevent the optimization of the loads to
+   known constants.  */
+/* { dg-final { scan-assembler "movl\[ \\t]*\\\$" { xfail { ! nonpic } } } } */
+/* { dg-final { scan-assembler "movb\[ \\t]*\\\$0, " { xfail { ! nonpic } } } } */
+/* { dg-final { scan-assembler-not "movzwl" { xfail { ! nonpic } } } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr95126-m32-2.c b/gcc/testsuite/gcc.target/i386/pr95126-m32-2.c
index b46be9d112bc9c1ebf9f51f42383fe84f16a4876..f4d9123a7680078a9815635258eff507cedc22fb 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr95126-m32-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr95126-m32-2.c
@@ -10,7 +10,8 @@ void call_func(void)
   func(s);
 }
 
-/* { dg-final { scan-assembler "movl\[ \\t]*\\\$" } } */
-/* { dg-final { scan-assembler "movb\[ \\t]*\\\$0, " } } */
-/* { dg-final { scan-assembler-not "movzwl" } } */
-
+/* The @GOTOFF addressing seems to prevent the optimization of the loads to
+   known constants.  */
+/* { dg-final { scan-assembler "movl\[ \\t]*\\\$" { xfail { ! nonpic } } } } */
+/* { dg-final { scan-assembler "movb\[ \\t]*\\\$0, " { xfail { ! nonpic } } } } */
+/* { dg-final { scan-assembler-not "movzwl" { xfail { ! nonpic } } } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr95852-2.c b/gcc/testsuite/gcc.target/i386/pr95852-2.c
index de85cecfe15e519744d3025d01ee343c3f4e1b8f..558308fee1fe35997aa68d9b520a602ddc861aee 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr95852-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr95852-2.c
@@ -3,7 +3,13 @@
 /* { dg-options "-O2 -fdump-tree-optimized -masm=att" } */
 /* { dg-final { scan-tree-dump-times " = \.MUL_OVERFLOW " 32 "optimized" } } */
 /* { dg-final { scan-assembler-times "\tmull\t" 32 } } */
-/* { dg-final { scan-assembler-times "\tseto\t" 8 } } */
+/* In functions that return 0 on non-overflow (f2, f10, f18, f26), the overflow
+   flag is propagated to the return value's PHI node in the non-call path; on
+   ia32 PIC, sibcalls are not viable, so the known value of the flag can't be
+   propagated to the return block, that is only duplicated in bbro, too late
+   for fwprop2 or even cprop_hardreg.  */
+/* { dg-final { scan-assembler-times "\tseto\t" 12 { target { ia32 && { ! nonpic } } } } } */
+/* { dg-final { scan-assembler-times "\tseto\t" 8 { target { nonpic || { ! ia32 } } } } } */
 /* { dg-final { scan-assembler-times "\tsetno\t" 8 } } */
 /* { dg-final { scan-assembler-times "\tjn\?o\t" 16 } } */
 

diff --git a/gcc/testsuite/gcc.target/i386/pr95852-4.c b/gcc/testsuite/gcc.target/i386/pr95852-4.c
index f8b46564baa39c7a081b971e03c0c1b99d16a822..cb48b61121e5d96f63c4985a63e1c19c196e9d9f 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr95852-4.c
+++ b/gcc/testsuite/gcc.target/i386/pr95852-4.c
@@ -3,7 +3,13 @@
 /* { dg-options "-O2 -fdump-tree-optimized -masm=att" } */
 /* { dg-final { scan-tree-dump-times " = \.MUL_OVERFLOW " 32 "optimized" } } */
 /* { dg-final { scan-assembler-times "\timull\t" 32 } } */
-/* { dg-final { scan-assembler-times "\tseto\t" 8 } } */
+/* In functions that return 0 on non-overflow (f2, f10, f18, f26), the overflow
+   flag is propagated to the return value's PHI node in the non-call path; on
+   ia32 PIC, sibcalls are not viable, so the known value of the flag can't be
+   propagated to the return block, that is only duplicated in bbro, too late
+   for fwprop2 or even cprop_hardreg.  */
+/* { dg-final { scan-assembler-times "\tseto\t" 12 { target { ia32 && { ! nonpic } } } } } */
+/* { dg-final { scan-assembler-times "\tseto\t" 8 { target { nonpic || { ! ia32 } } } } } */
 /* { dg-final { scan-assembler-times "\tsetno\t" 8 } } */
 /* { dg-final { scan-assembler-times "\tjn\?o\t" 16 } } */
 

diff --git a/gcc/testsuite/gcc.target/i386/pr96539.c b/gcc/testsuite/gcc.target/i386/pr96539.c
index fc164f8b88985df2d4fbc7041bf3eba7ba297ee3..696929be0af2da542728cafd2577e0d09d3085bd 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr96539.c
+++ b/gcc/testsuite/gcc.target/i386/pr96539.c
@@ -1,6 +1,9 @@
 /* PR rtl-optimization/96539 */
 /* { dg-do compile } *
 /* { dg-options "-Os" } */
+/* The need to restore the PIC register prevents PLT tail-calls on ia32,
+   so S has to be copied to call baz.  */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 /* { dg-final { scan-assembler-not "rep\[^\n\r]\*movs" } } */
 
 struct A { int a, b, c, d, e, f; void *g, *h, *i, *j, *k, *l, *m; };

diff --git a/gcc/testsuite/gcc.target/i386/stack-check-12.c b/gcc/testsuite/gcc.target/i386/stack-check-12.c
index 74d3a26cad1f2592a558fcd6045bdbebb122cce7..aa9c233e749928402f1998e096e3340adc99a8bc 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/stack-check-12.c
+++ b/gcc/testsuite/gcc.target/i386/stack-check-12.c
@@ -11,8 +11,9 @@ f (void)
 }
 
 /* { dg-final { scan-assembler-not "or\[ql\]" } } */
-/* { dg-final { scan-assembler "pushl  %esi" { target ia32 } } } */
-/* { dg-final { scan-assembler "popl   %esi" { target ia32 } } }*/
+/* On ia32 PIC, saving the PIC register requires a stack frame, which does away
+   with the need for the dummy %esi pushing and popping for stack probing.  */
+/* { dg-final { scan-assembler "pushl  %esi" { target { ia32 && nonpic } } } } */
+/* { dg-final { scan-assembler "popl   %esi" { target { ia32 && nonpic } } } } */
 /* { dg-final { scan-assembler "pushq  %rax" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler "popq   %rax" { target { ! ia32 } } } }*/
-
+/* { dg-final { scan-assembler "popq   %rax" { target { ! ia32 } } } } */

diff --git a/gcc/testsuite/gcc.target/i386/stack-check-17.c b/gcc/testsuite/gcc.target/i386/stack-check-17.c
index 25ae97740614e3a416d27f6373acf85f8d7d2ad7..b3e41cb3d25560290f31501d3d2119c81cdfce43 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/stack-check-17.c
+++ b/gcc/testsuite/gcc.target/i386/stack-check-17.c
@@ -31,9 +31,11 @@ f3 (void)
    into either a stack slot or callee saved register.  The former
    would be rather dumb.  So assume it does not happen.
 
-   So search for two/four pushes for the callee register saves/argument
-   pushes and no pops (since the function has no reachable epilogue).  */
+   So search for two/four pushes for the callee register saves/argument pushes
+   (plus one for the PIC register if needed on ia32) and no pops (since the
+   function has no reachable epilogue).  */
 /* { dg-final { scan-assembler-times "push\[ql\]" 2 { target { ! ia32 } } } }  */
-/* { dg-final { scan-assembler-times "push\[ql\]" 4 { target { ia32 } } } }  */
+/* { dg-final { scan-assembler-times "push\[ql\]" 4 { target { ia32 && nonpic } } } }  */
+/* { dg-final { scan-assembler-times "push\[ql\]" 5 { target { ia32 && { ! nonpic } } } } }  */
 /* { dg-final { scan-assembler-not "pop" } } */
 

diff --git a/gcc/testsuite/gcc.target/i386/stack-prot-sym.c b/gcc/testsuite/gcc.target/i386/stack-prot-sym.c
index dcd7cbd38be380857ab2d6ca6e4db71f60c04313..81790f63753f120aa38e6170920ba5542bd070a1 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/stack-prot-sym.c
+++ b/gcc/testsuite/gcc.target/i386/stack-prot-sym.c
@@ -1,6 +1,8 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target tls_native } */
 /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=tls -mstack-protector-guard-reg=gs -mstack-protector-guard-symbol=my_guard" } */
+/* We don't expect GOT relocations; should we?  */
+/* { dg-additional-options "-fno-PIE" { target ia32 } } */
 
 void f(void) { }