/*********************************************************
- * Copyright (C) 1998-2017 VMware, Inc. All rights reserved.
+ * Copyright (C) 1998-2018 VMware, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU Lesser General Public License as published
* XTEST
* Return TRUE if processor is in transaction region.
*
+ * Using condition codes as output values (=@ccnz) requires gcc6 or
+ * above. Clang does not support condition codes as output
+ * constraints.
+ *
*/
#if defined(__GNUC__) && (defined(VMM) || defined(VMKERNEL) || defined(FROBOS))
static INLINE Bool
xtest(void)
{
- uint8 al;
- __asm__ __volatile__(".byte 0x0f, 0x01, 0xd6 # xtest \n"
- "setnz %%al\n"
- : "=a"(al) : : "cc");
- return al;
+ Bool result;
+#if defined(__clang__)
+ __asm__ __volatile__("xtest\n"
+ "setnz %%al"
+ : "=a" (result) : : "cc");
+#else
+ __asm__ __volatile__("xtest"
+ : "=@ccnz" (result) : : "cc");
+#endif
+ return result;
}
#endif /* __GNUC__ */
/*********************************************************
- * Copyright (C) 1998-2017 VMware, Inc. All rights reserved.
+ * Copyright (C) 1998-2018 VMware, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU Lesser General Public License as published
*/
#if defined(__GNUC__)
-static INLINE void
+static INLINE void
FXSAVE_ES1(void *save)
{
__asm__ __volatile__ ("fxsaveq %0 \n" : "=m" (*(uint8 *)save) : : "memory");
}
-static INLINE void
+static INLINE void
FXSAVE_COMPAT_ES1(void *save)
{
__asm__ __volatile__ ("fxsave %0 \n" : "=m" (*(uint8 *)save) : : "memory");
}
-static INLINE void
+static INLINE void
FXRSTOR_ES1(const void *load)
{
__asm__ __volatile__ ("fxrstorq %0 \n"
: : "m" (*(const uint8 *)load) : "memory");
}
-static INLINE void
+static INLINE void
FXRSTOR_COMPAT_ES1(const void *load)
{
__asm__ __volatile__ ("fxrstor %0 \n"
: : "m" (*(const uint8 *)load) : "memory");
}
-static INLINE void
+static INLINE void
FXRSTOR_AMD_ES0(const void *load)
{
uint64 dummy = 0;
- __asm__ __volatile__
+ __asm__ __volatile__
("fnstsw %%ax \n" // Grab x87 ES bit
"bt $7,%%ax \n" // Test ES bit
"jnc 1f \n" // Jump if ES=0
*/
#if defined(__GNUC__) && (defined(VMM) || defined(VMKERNEL) || defined(FROBOS))
-static INLINE void
+static INLINE void
XSAVE_ES1(void *save, uint64 mask)
{
#if __GNUC__ < 4 || __GNUC__ == 4 && __GNUC_MINOR__ == 1
#endif
}
-static INLINE void
+static INLINE void
XSAVE_COMPAT_ES1(void *save, uint64 mask)
{
#if __GNUC__ < 4 || __GNUC__ == 4 && __GNUC_MINOR__ == 1
#endif
}
-static INLINE void
+static INLINE void
XSAVEOPT_ES1(void *save, uint64 mask)
{
__asm__ __volatile__ (
: "memory");
}
-static INLINE void
+static INLINE void
XRSTOR_ES1(const void *load, uint64 mask)
{
#if __GNUC__ < 4 || __GNUC__ == 4 && __GNUC_MINOR__ == 1
#endif
}
-static INLINE void
+static INLINE void
XRSTOR_COMPAT_ES1(const void *load, uint64 mask)
{
#if __GNUC__ < 4 || __GNUC__ == 4 && __GNUC_MINOR__ == 1
#endif
}
-static INLINE void
+static INLINE void
XRSTOR_AMD_ES0(const void *load, uint64 mask)
{
uint64 dummy = 0;
- __asm__ __volatile__
+ __asm__ __volatile__
("fnstsw %%ax \n" // Grab x87 ES bit
"bt $7,%%ax \n" // Test ES bit
"jnc 1f \n" // Jump if ES=0
* XTEST
* Return TRUE if processor is in transaction region.
*
+ * Using condition codes as output values (=@ccnz) requires gcc6 or
+ * above. Clang does not support condition codes as output
+ * constraints.
+ *
*/
#if defined(__GNUC__) && (defined(VMM) || defined(VMKERNEL) || defined(FROBOS))
static INLINE Bool
xtest(void)
{
- uint8 al;
- __asm__ __volatile__(".byte 0x0f, 0x01, 0xd6 # xtest \n"
- "setnz %%al\n"
- : "=a"(al) : : "cc");
- return al;
+ Bool result;
+#if defined(__clang__)
+ __asm__ __volatile__("xtest\n"
+ "setnz %%al"
+ : "=a" (result) : : "cc");
+#else
+ __asm__ __volatile__("xtest"
+ : "=@ccnz" (result) : : "cc");
+#endif
+ return result;
}
#endif /* __GNUC__ */
*
* Unsigned integer by fixed point multiplication, with rounding:
* result = floor(multiplicand * multiplier * 2**(-shift) + 0.5)
- *
+ *
* Unsigned 64-bit integer multiplicand.
* Unsigned 64-bit fixed point multiplier, represented as
* (multiplier, shift), where shift < 64.
*
* Signed integer by fixed point multiplication, with rounding:
* result = floor(multiplicand * multiplier * 2**(-shift) + 0.5)
- *
+ *
* Signed 64-bit integer multiplicand.
* Unsigned 64-bit fixed point multiplier, represented as
* (multiplier, shift), where shift < 64.
*
* Unsigned integer by fixed point multiplication, with rounding:
* result = floor(multiplicand * multiplier * 2**(-shift) + 0.5)
- *
+ *
* Unsigned 64-bit integer multiplicand.
* Unsigned 32-bit fixed point multiplier, represented as
* (multiplier, shift), where shift < 64.
*
* Signed integer by fixed point multiplication, with rounding:
* result = floor(multiplicand * multiplier * 2**(-shift) + 0.5)
- *
+ *
* Signed 64-bit integer multiplicand.
* Unsigned 32-bit fixed point multiplier, represented as
* (multiplier, shift), where shift < 64.