arm64: dts: socfpga: stratix10: Add emmc support

The Stratix10 devkit supports a separate eMMC daughter card. The eMMC
daughter card replaces the SDMMC slot that is on the default daughter card
and thus requires a separate board dts file.

Signed-off-by: Ng Tze Yee <tzeyee.ng@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile
index 1bf0c472f6b4ac625e113d0010a940bf52626a12..540bb5ae746b32d7e3033a95ec6eb9a4fe8c54e5 100644 (file)
--- a/arch/arm64/boot/dts/altera/Makefile
+++ b/arch/arm64/boot/dts/altera/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-only
 dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_stratix10_socdk.dtb \
+                               socfpga_stratix10_socdk_emmc.dtb \
                                socfpga_stratix10_socdk_nand.dtb \
                                socfpga_stratix10_swvp.dtb

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index 4ae18a013bbed7ebce3c2044d5cb3b5a682bd27d..e2a1cea7f3da9ff22e20d800f5ce98557dd07794 100644 (file)
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -3,53 +3,11 @@
  * Copyright Altera Corporation (C) 2015. All rights reserved.
  */
 
-#include "socfpga_stratix10.dtsi"
+#include "socfpga_stratix10_socdk.dtsi"
 
 / {
        model = "SoCFPGA Stratix 10 SoCDK";
        compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
-
-       aliases {
-               serial0 = &uart0;
-               ethernet0 = &gmac0;
-               ethernet1 = &gmac1;
-               ethernet2 = &gmac2;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       leds {
-               compatible = "gpio-leds";
-               led-hps0 {
-                       label = "hps_led0";
-                       gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
-               };
-
-               led-hps1 {
-                       label = "hps_led1";
-                       gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
-               };
-
-               led-hps2 {
-                       label = "hps_led2";
-                       gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
-               };
-       };
-
-       memory@80000000 {
-               device_type = "memory";
-               /* We expect the bootloader to fill in the reg */
-               reg = <0 0x80000000 0 0>;
-       };
-
-       ref_033v: regulator-v-ref {
-               compatible = "regulator-fixed";
-               regulator-name = "0.33V";
-               regulator-min-microvolt = <330000>;
-               regulator-max-microvolt = <330000>;
-       };
 };
 
 &pinctrl0 {
@@ -68,10 +26,6 @@
        };
 };
 
-&gpio1 {
-       status = "okay";
-};
-
 &gmac0 {
        status = "okay";
        phy-mode = "rgmii";
@@ -83,7 +37,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "snps,dwmac-mdio";
-               phy0: ethernet-phy@0 {
+               phy0: ethernet-phy@4 {
                        reg = <4>;
 
                        txd0-skew-ps = <0>; /* -420ps */
@@ -111,23 +65,6 @@
        clk-phase-sd-hs = <0>, <135>;
 };
 
-&osc1 {
-       clock-frequency = <25000000>;
-};
-
-&uart0 {
-       status = "okay";
-};
-
-&usb0 {
-       status = "okay";
-       disable-over-current;
-};
-
-&watchdog0 {
-       status = "okay";
-};
-
 &i2c1 {
        status = "okay";
        clock-frequency = <100000>;

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dtsi
new file mode 100755 (executable)
index 0000000..1d50f7b
--- /dev/null
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dtsi
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright Altera Corporation (C) 2026. All rights reserved.
+ */
+
+#include "socfpga_stratix10.dtsi"
+
+/ {
+       aliases {
+               serial0 = &uart0;
+               ethernet0 = &gmac0;
+               ethernet1 = &gmac1;
+               ethernet2 = &gmac2;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               led-hps0 {
+                       label = "hps_led0";
+                       gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
+               };
+
+               led-hps1 {
+                       label = "hps_led1";
+                       gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
+               };
+
+               led-hps2 {
+                       label = "hps_led2";
+                       gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               /* We expect the bootloader to fill in the reg */
+               reg = <0 0x80000000 0 0>;
+       };
+
+       ref_033v: regulator-0v33-ref {
+               compatible = "regulator-fixed";
+               regulator-name = "0.33V";
+               regulator-min-microvolt = <330000>;
+               regulator-max-microvolt = <330000>;
+       };
+};
+
+&gpio1 {
+       status = "okay";
+};
+
+&osc1 {
+       clock-frequency = <25000000>;
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+       disable-over-current;
+};
+
+&watchdog0 {
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_emmc.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_emmc.dts
new file mode 100755 (executable)
index 0000000..b2a3449
--- /dev/null
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_emmc.dts
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright Altera Corporation (C) 2026. All rights reserved.
+ */
+
+#include "socfpga_stratix10_socdk.dtsi"
+
+/ {
+       model = "SoCFPGA Stratix 10 SoCDK eMMC daughter board";
+       compatible = "altr,socfpga-stratix10-socdk-emmc",
+                       "altr,socfpga-stratix10-socdk",
+                       "altr,socfpga-stratix10";
+};
+
+&gmac2 {
+       status = "okay";
+       /* PHY delays is configured via skew properties */
+       phy-mode = "rgmii";
+       phy-handle = <&phy0>;
+
+       max-frame-size = <9000>;
+
+       mdio0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+               phy0: ethernet-phy@4 {
+                       reg = <4>;
+
+                       txd0-skew-ps = <0>; /* -420ps */
+                       txd1-skew-ps = <0>; /* -420ps */
+                       txd2-skew-ps = <0>; /* -420ps */
+                       txd3-skew-ps = <0>; /* -420ps */
+                       rxd0-skew-ps = <420>; /* 0ps */
+                       rxd1-skew-ps = <420>; /* 0ps */
+                       rxd2-skew-ps = <420>; /* 0ps */
+                       rxd3-skew-ps = <420>; /* 0ps */
+                       txen-skew-ps = <0>; /* -420ps */
+                       txc-skew-ps = <900>; /* 0ps */
+                       rxdv-skew-ps = <420>; /* 0ps */
+                       rxc-skew-ps = <1680>; /* 780ps */
+               };
+       };
+};
+
+&mmc {
+       status = "okay";
+       cap-mmc-highspeed;
+       broken-cd;
+       bus-width = <4>;
+       clk-phase-sd-hs = <0>, <135>;
+};
+
+&i2c2 {
+       status = "okay";
+       clock-frequency = <100000>;
+       i2c-sda-falling-time-ns = <890>;  /* hcnt */
+       i2c-scl-falling-time-ns = <890>;  /* lcnt */
+
+       adc@14 {
+               compatible = "lltc,ltc2497";
+               reg = <0x14>;
+               vref-supply = <&ref_033v>;
+       };
+
+       temp@4c {
+               compatible = "maxim,max1619";
+               reg = <0x4c>;
+       };
+
+       eeprom@51 {
+               compatible = "atmel,24c32";
+               reg = <0x51>;
+               pagesize = <32>;
+       };
+
+       rtc@68 {
+               compatible = "dallas,ds1339";
+               reg = <0x68>;
+       };
+};