Verify destination[source] of a load[store] instruction is a register.

	Backported from master:
	2021-08-09  Pat Haugen  <pthaugen@linux.ibm.com>

gcc/ChangeLog:

	* config/rs6000/rs6000.c (is_load_insn1): Verify destination is a
	register.
	(is_store_insn1): Verify source is a register.

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 843ce97b9932ccff25dcedfdc893d09abab2033c..528a6f552bfd40b5c4de07a14bdc033367a9649d 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -18731,7 +18731,12 @@ is_load_insn1 (rtx pat, rtx *load_mem)
     return false;
 
   if (GET_CODE (pat) == SET)
-    return find_mem_ref (SET_SRC (pat), load_mem);
+    {
+      if (REG_P (SET_DEST (pat)))
+       return find_mem_ref (SET_SRC (pat), load_mem);
+      else
+       return false;
+    }
 
   if (GET_CODE (pat) == PARALLEL)
     {
@@ -18768,7 +18773,12 @@ is_store_insn1 (rtx pat, rtx *str_mem)
     return false;
 
   if (GET_CODE (pat) == SET)
-    return find_mem_ref (SET_DEST (pat), str_mem);
+    {
+      if (REG_P (SET_SRC (pat)) || SUBREG_P (SET_SRC (pat)))
+       return find_mem_ref (SET_DEST (pat), str_mem);
+      else
+       return false;
+    }
 
   if (GET_CODE (pat) == PARALLEL)
     {