arm64: dts: imx93: add the Flex-CAN stop mode by GPR

[ Upstream commit 23ed2be5404da7cee6a519fa69bf22d0f69da4e4 ]

imx93 A0 chip use the internal q-channel handshake signal in LPCG
and CCM to automatically handle the Flex-CAN stop mode. But this
method meet issue when do the system PM stress test. IC can't fix
it easily. So in the new imx93 A1 chip, IC drop this method, and
involve back the old way，use the GPR method to trigger the Flex-CAN
stop mode signal. Now NXP claim to drop imx93 A0, and only support
imx93 A1. So here add the stop mode through GPR.

This patch also fix a typo for aonmix_ns_gpr.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Link: https://lore.kernel.org/all/20230726112458.3524165-1-haibo.chen@nxp.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 1d8dd14b65cfa8ec5ee610194b6001e05979587b..2a9b89bf52698101370442ef567d3c2352da8eca 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -146,7 +146,7 @@
                        #size-cells = <1>;
                        ranges;
 
-                       anomix_ns_gpr: syscon@44210000 {
+                       aonmix_ns_gpr: syscon@44210000 {
                                compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
                                reg = <0x44210000 0x1000>;
                        };
@@ -280,6 +280,7 @@
                                assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
                                assigned-clock-rates = <40000000>;
                                fsl,clk-source = /bits/ 8 <0>;
+                               fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
                                status = "disabled";
                        };
 
@@ -532,6 +533,7 @@
                                assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
                                assigned-clock-rates = <40000000>;
                                fsl,clk-source = /bits/ 8 <0>;
+                               fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
                                status = "disabled";
                        };