return 0;
}
+static struct evsel *cs_etm_get_evsel(struct evlist *evlist,
+ struct perf_pmu *cs_etm_pmu)
+{
+ struct evsel *evsel;
+
+ evlist__for_each_entry(evlist, evsel) {
+ if (evsel->core.attr.type == cs_etm_pmu->type)
+ return evsel;
+ }
+
+ return NULL;
+}
+
static int cs_etm_recording_options(struct auxtrace_record *itr,
struct evlist *evlist,
struct record_opts *opts)
static u64 cs_etm_get_config(struct auxtrace_record *itr)
{
- u64 config = 0;
struct cs_etm_recording *ptr =
container_of(itr, struct cs_etm_recording, itr);
struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu;
struct evlist *evlist = ptr->evlist;
- struct evsel *evsel;
+ struct evsel *evsel = cs_etm_get_evsel(evlist, cs_etm_pmu);
- evlist__for_each_entry(evlist, evsel) {
- if (evsel->core.attr.type == cs_etm_pmu->type) {
- /*
- * Variable perf_event_attr::config is assigned to
- * ETMv3/PTM. The bit fields have been made to match
- * the ETMv3.5 ETRMCR register specification. See the
- * PMU_FORMAT_ATTR() declarations in
- * drivers/hwtracing/coresight/coresight-perf.c for
- * details.
- */
- config = evsel->core.attr.config;
- break;
- }
- }
-
- return config;
+ /*
+ * Variable perf_event_attr::config is assigned to
+ * ETMv3/PTM. The bit fields have been made to match
+ * the ETMv3.5 ETRMCR register specification. See the
+ * PMU_FORMAT_ATTR() declarations in
+ * drivers/hwtracing/coresight/coresight-perf.c for
+ * details.
+ */
+ return evsel ? evsel->core.attr.config : 0;
}
#ifndef BIT
{
struct cs_etm_recording *ptr =
container_of(itr, struct cs_etm_recording, itr);
- struct evsel *evsel;
+ struct evsel *evsel = cs_etm_get_evsel(ptr->evlist, ptr->cs_etm_pmu);
+
+ if (evsel)
+ return evsel__disable(evsel);
- evlist__for_each_entry(ptr->evlist, evsel) {
- if (evsel->core.attr.type == ptr->cs_etm_pmu->type)
- return evsel__disable(evsel);
- }
return -EINVAL;
}