doc, pdp11: Clean up PDP-11 documentation [PR122243]

While working on this patch I saw that this target has an -mlra option
that still defaults to off.  Although the LRA support was added in
2018 apparently it wasn't robust enough to enable by default.  We are
supposed to be deleting reload support and all targets that don't use
LRA by default in GCC 16, so this target may be declared obsolete very
soon, but I've made the documentation of other options consistent with
the .opt files and conventions used for other targets anyway in case
either somebody who can build/test for this target switches the
default (see PR target/113947) or the reload removal is postponed.

gcc/ChangeLog
	PR other/122243
	* config/pdp11/pdp11.opt (m40, m45): Add RejectNegative.
	* doc/invoke.texi (Option Summary) <PDP-11 Options>: Remove
	redundant -mno- forms from the list.
	(PDP-11 Options): Fix some markup issues.  Merge documentation
	of positive and negative forms of -mac0.  Index negative forms
	of -msplit, -mlra.

diff --git a/gcc/config/pdp11/pdp11.opt b/gcc/config/pdp11/pdp11.opt
index 39f1e63113fc9b2dbc3555a89a720d2b1e49e736..24d4b8affcfe701b90b82778248124e1dff26b41 100644 (file)
--- a/gcc/config/pdp11/pdp11.opt
+++ b/gcc/config/pdp11/pdp11.opt
@@ -23,11 +23,11 @@ Target RejectNegative
 Generate code for an 11/10.
 
 m40
-Target Mask(40)
+Target Mask(40) RejectNegative
 Generate code for an 11/40.
 
 m45
-Target Mask(45)
+Target Mask(45) RejectNegative
 Generate code for an 11/45.
 
 mac0

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ca200839618026808e1b841e0b6263c546e5cce1..2e45f11f8f4455dbbb31d08dc718ed33126cd9fd 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1292,8 +1292,8 @@ Objective-C and Objective-C++ Dialects}.
 -mcmodel=@var{code-model}}
 
 @emph{PDP-11 Options} (@ref{PDP-11 Options})
-@gccoptlist{-mfpu  -msoft-float  -mac0  -mno-ac0  -m40  -m45  -m10
--mint32  -mno-int16  -mint16  -mno-int32
+@gccoptlist{-mfpu  -msoft-float  -mac0  -m40  -m45  -m10
+-mint32  -mint16
 -msplit  -munix-asm  -mdec-asm  -mgnu-asm  -mlra}
 
 @emph{PowerPC Options}
@@ -31710,23 +31710,24 @@ These options are defined for the PDP-11:
 @opindex mfpu
 @item -mfpu
 Use hardware FPP floating point.  This is the default.  (FIS floating
-point on the PDP-11/40 is not supported.)  Implies -m45.
+point on the PDP-11/40 is not supported.)  Implies @option{-m45}.
 
 @opindex msoft-float
 @item -msoft-float
 Do not use hardware floating point.
 
 @opindex mac0
-@item -mac0
-Return floating-point results in ac0 (fr0 in Unix assembler syntax).
-
 @opindex mno-ac0
-@item -mno-ac0
-Return floating-point results in memory.  This is the default.
+@item -mac0
+@itemx -mno-ac0
+With @option{-mac0}, return floating-point results in ac0
+(fr0 in Unix assembler syntax).  The default, @option{-mno-ac0}, is
+to return floating-point results in memory.
 
 @opindex m40
 @item -m40
-Generate code for a PDP-11/40.  Implies -msoft-float -mno-split.
+Generate code for a PDP-11/40.
+Implies @option{-msoft-float} @option{-mno-split}.
 
 @opindex m45
 @item -m45
@@ -31734,7 +31735,8 @@ Generate code for a PDP-11/45.  This is the default.
 
 @opindex m10
 @item -m10
-Generate code for a PDP-11/10.  Implies -msoft-float -mno-split.
+Generate code for a PDP-11/10.
+Implies @option{-msoft-float} @option{-mno-split}.
 
 @opindex mint16
 @opindex mno-int32
@@ -31749,8 +31751,9 @@ Use 16-bit @code{int}.  This is the default.
 Use 32-bit @code{int}.
 
 @opindex msplit
+@opindex mno-split
 @item -msplit
-Target has split instruction and data space.  Implies -m45.
+Target has split instruction and data space.  Implies @option{-m45}.
 
 @opindex munix-asm
 @item -munix-asm
@@ -31765,6 +31768,7 @@ Use DEC assembler syntax.
 Use GNU assembler syntax.  This is the default.
 
 @opindex mlra
+@opindex mno-lra
 @item -mlra
 Use the new LRA register allocator.  By default, the old ``reload''
 allocator is used.