arm64: dts: qcom: sm8350: Use proper CPU compatibles

[ Upstream commit 4390730cc12af25f7c997f477795f5f4200149c0 ]

The Kryo names (once again) turned out to be fake. The CPUs report:

0x412fd050 (CA55 r2p0) (0 - 3)
0x411fd410 (CA78 r1p1) (4 - 6)
0x411fd440 (CX1  r1p1) (7)

Use the compatibles that reflect that.

Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230706-topic-sm8350-cpu-compat-v1-1-f8d6a1869781@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 635e9f17a549fde0958a1ab71da7dfd720a9497c..b0ba63b5869d20be75a8fe62cff02443b392e257 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -61,7 +61,7 @@
 
                CPU0: cpu@0 {
                        device_type = "cpu";
-                       compatible = "qcom,kryo685";
+                       compatible = "arm,cortex-a55";
                        reg = <0x0 0x0>;
                        enable-method = "psci";
                        next-level-cache = <&L2_0>;
@@ -78,7 +78,7 @@
 
                CPU1: cpu@100 {
                        device_type = "cpu";
-                       compatible = "qcom,kryo685";
+                       compatible = "arm,cortex-a55";
                        reg = <0x0 0x100>;
                        enable-method = "psci";
                        next-level-cache = <&L2_100>;
@@ -92,7 +92,7 @@
 
                CPU2: cpu@200 {
                        device_type = "cpu";
-                       compatible = "qcom,kryo685";
+                       compatible = "arm,cortex-a55";
                        reg = <0x0 0x200>;
                        enable-method = "psci";
                        next-level-cache = <&L2_200>;
@@ -106,7 +106,7 @@
 
                CPU3: cpu@300 {
                        device_type = "cpu";
-                       compatible = "qcom,kryo685";
+                       compatible = "arm,cortex-a55";
                        reg = <0x0 0x300>;
                        enable-method = "psci";
                        next-level-cache = <&L2_300>;
@@ -120,7 +120,7 @@
 
                CPU4: cpu@400 {
                        device_type = "cpu";
-                       compatible = "qcom,kryo685";
+                       compatible = "arm,cortex-a78";
                        reg = <0x0 0x400>;
                        enable-method = "psci";
                        next-level-cache = <&L2_400>;
@@ -134,7 +134,7 @@
 
                CPU5: cpu@500 {
                        device_type = "cpu";
-                       compatible = "qcom,kryo685";
+                       compatible = "arm,cortex-a78";
                        reg = <0x0 0x500>;
                        enable-method = "psci";
                        next-level-cache = <&L2_500>;
@@ -149,7 +149,7 @@
 
                CPU6: cpu@600 {
                        device_type = "cpu";
-                       compatible = "qcom,kryo685";
+                       compatible = "arm,cortex-a78";
                        reg = <0x0 0x600>;
                        enable-method = "psci";
                        next-level-cache = <&L2_600>;
@@ -163,7 +163,7 @@
 
                CPU7: cpu@700 {
                        device_type = "cpu";
-                       compatible = "qcom,kryo685";
+                       compatible = "arm,cortex-x1";
                        reg = <0x0 0x700>;
                        enable-method = "psci";
                        next-level-cache = <&L2_700>;