x86: Use AVX2 memcpy/memset on Skylake server [BZ #21396]

On Skylake server, AVX512 load/store instructions in memcpy/memset may
lead to lower CPU turbo frequency in certain situations.  Use of AVX2
in memcpy/memset has been observed to have improved overall performance
in many workloads due to the higher frequency.

Since AVX512ER is unique to Xeon Phi, this patch sets Prefer_No_AVX512
if AVX512ER isn't available so that AVX2 versions of memcpy/memset are
used on Skylake server.

	[BZ #21396]
	* sysdeps/x86/cpu-features.c (init_cpu_features): Set
	Prefer_No_AVX512 if AVX512ER isn't available.
	* sysdeps/x86/cpu-features.h (bit_arch_Prefer_No_AVX512): New.
	(index_arch_Prefer_No_AVX512): Likewise.
	* sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Don't use
	AVX512 version if Prefer_No_AVX512 is set.
	* sysdeps/x86_64/multiarch/memcpy_chk.S (__memcpy_chk):
	Likewise.
	* sysdeps/x86_64/multiarch/memmove.S (__libc_memmove): Likewise.
	* sysdeps/x86_64/multiarch/memmove_chk.S (__memmove_chk):
	Likewise.
	* sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Likewise.
	* sysdeps/x86_64/multiarch/mempcpy_chk.S (__mempcpy_chk):
	Likewise.
	* sysdeps/x86_64/multiarch/memset.S (memset): Likewise.
	* sysdeps/x86_64/multiarch/memset_chk.S (__memset_chk):
	Likewise.

diff --git a/ChangeLog b/ChangeLog
index 51ae9c18b23646b141007a67a8452f2ac22c349a..677e5e2107e51134e0f2df22736282a34693574e 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,24 @@
+2017-04-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       [BZ #21396]
+       * sysdeps/x86/cpu-features.c (init_cpu_features): Set
+       Prefer_No_AVX512 if AVX512ER isn't available.
+       * sysdeps/x86/cpu-features.h (bit_arch_Prefer_No_AVX512): New.
+       (index_arch_Prefer_No_AVX512): Likewise.
+       * sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Don't use
+       AVX512 version if Prefer_No_AVX512 is set.
+       * sysdeps/x86_64/multiarch/memcpy_chk.S (__memcpy_chk):
+       Likewise.
+       * sysdeps/x86_64/multiarch/memmove.S (__libc_memmove): Likewise.
+       * sysdeps/x86_64/multiarch/memmove_chk.S (__memmove_chk):
+       Likewise.
+       * sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Likewise.
+       * sysdeps/x86_64/multiarch/mempcpy_chk.S (__mempcpy_chk):
+       Likewise.
+       * sysdeps/x86_64/multiarch/memset.S (memset): Likewise.
+       * sysdeps/x86_64/multiarch/memset_chk.S (__memset_chk):
+       Likewise.
+
 2017-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 
        * sysdeps/x86/cpu-features.c (init_cpu_features): Set

diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index ae7f844f8b6b593987c82d2b7d2a8d1f2d1555d1..f30918dd3bee0317f868edc1ba8448f7a209991f 100644 (file)
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -224,10 +224,14 @@ init_cpu_features (struct cpu_features *cpu_features)
          |= bit_arch_AVX_Fast_Unaligned_Load;
 
       /* Since AVX512ER is unique to Xeon Phi, set Prefer_No_VZEROUPPER
-         if AVX512ER is available.  */
+         if AVX512ER is available.  Don't use AVX512 to avoid lower CPU
+        frequency if AVX512ER isn't available.  */
       if (CPU_FEATURES_CPU_P (cpu_features, AVX512ER))
        cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
          |= bit_arch_Prefer_No_VZEROUPPER;
+      else
+       cpu_features->feature[index_arch_Prefer_No_AVX512]
+         |= bit_arch_Prefer_No_AVX512;
 
       /* To avoid SSE transition penalty, use _dl_runtime_resolve_slow.
          If XGETBV suports ECX == 1, use _dl_runtime_resolve_opt.  */

diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
index 1583d653457feb9a235b86fe82e9302a01d0bc7e..85a39e7d706e063632a1204e8d7a573c35307424 100644 (file)
--- a/sysdeps/x86/cpu-features.h
+++ b/sysdeps/x86/cpu-features.h
@@ -39,6 +39,7 @@
 #define bit_arch_Prefer_ERMS                   (1 << 19)
 #define bit_arch_Use_dl_runtime_resolve_opt    (1 << 20)
 #define bit_arch_Use_dl_runtime_resolve_slow   (1 << 21)
+#define bit_arch_Prefer_No_AVX512              (1 << 22)
 
 /* CPUID Feature flags.  */
 
@@ -118,6 +119,7 @@
 # define index_arch_Prefer_ERMS                FEATURE_INDEX_1*FEATURE_SIZE
 # define index_arch_Use_dl_runtime_resolve_opt FEATURE_INDEX_1*FEATURE_SIZE
 # define index_arch_Use_dl_runtime_resolve_slow FEATURE_INDEX_1*FEATURE_SIZE
+# define index_arch_Prefer_No_AVX512   FEATURE_INDEX_1*FEATURE_SIZE
 
 
 # if defined (_LIBC) && !IS_IN (nonlib)
@@ -302,6 +304,7 @@ extern const struct cpu_features *__get_cpu_features (void)
 # define index_arch_Prefer_ERMS                FEATURE_INDEX_1
 # define index_arch_Use_dl_runtime_resolve_opt FEATURE_INDEX_1
 # define index_arch_Use_dl_runtime_resolve_slow FEATURE_INDEX_1
+# define index_arch_Prefer_No_AVX512   FEATURE_INDEX_1
 
 #endif /* !__ASSEMBLER__ */
 

diff --git a/sysdeps/x86_64/multiarch/memcpy.S b/sysdeps/x86_64/multiarch/memcpy.S
index 1f83ee3e8477f57142c445275e653ae8544d9b65..af2770397ce69509205a904f6d433070b000e976 100644 (file)
--- a/sysdeps/x86_64/multiarch/memcpy.S
+++ b/sysdeps/x86_64/multiarch/memcpy.S
@@ -32,6 +32,8 @@ ENTRY(__new_memcpy)
        lea     __memcpy_erms(%rip), %RAX_LP
        HAS_ARCH_FEATURE (Prefer_ERMS)
        jnz     2f
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __memcpy_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memcpy_chk.S b/sysdeps/x86_64/multiarch/memcpy_chk.S
index 54923420f114080d9ad0ca5ba1d09e3f00b722ad..8737fb9755d7fe12dfa31c9e8d5bf8ed1b06fd1d 100644 (file)
--- a/sysdeps/x86_64/multiarch/memcpy_chk.S
+++ b/sysdeps/x86_64/multiarch/memcpy_chk.S
@@ -30,6 +30,8 @@
 ENTRY(__memcpy_chk)
        .type   __memcpy_chk, @gnu_indirect_function
        LOAD_RTLD_GLOBAL_RO_RDX
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __memcpy_chk_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memmove.S b/sysdeps/x86_64/multiarch/memmove.S
index 2021bfc30c65831fe0a1fa1b6f9ad7d353c78121..8c534e83e01198e6cbd4b69aa35c90a4d3f04c84 100644 (file)
--- a/sysdeps/x86_64/multiarch/memmove.S
+++ b/sysdeps/x86_64/multiarch/memmove.S
@@ -30,6 +30,8 @@ ENTRY(__libc_memmove)
        lea     __memmove_erms(%rip), %RAX_LP
        HAS_ARCH_FEATURE (Prefer_ERMS)
        jnz     2f
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __memmove_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memmove_chk.S b/sysdeps/x86_64/multiarch/memmove_chk.S
index 8a252adcae5088d88e1c50dcb3e7c322cd5ff40d..7870dd0247e95455b11b3ba1e32343ea970f518e 100644 (file)
--- a/sysdeps/x86_64/multiarch/memmove_chk.S
+++ b/sysdeps/x86_64/multiarch/memmove_chk.S
@@ -29,6 +29,8 @@
 ENTRY(__memmove_chk)
        .type   __memmove_chk, @gnu_indirect_function
        LOAD_RTLD_GLOBAL_RO_RDX
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __memmove_chk_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/mempcpy.S b/sysdeps/x86_64/multiarch/mempcpy.S
index 79c840d075aaf4f6476f2d4c3a1384da38c61021..b8b2b28094a6fac69125de060fc33f71826e5bc1 100644 (file)
--- a/sysdeps/x86_64/multiarch/mempcpy.S
+++ b/sysdeps/x86_64/multiarch/mempcpy.S
@@ -32,6 +32,8 @@ ENTRY(__mempcpy)
        lea     __mempcpy_erms(%rip), %RAX_LP
        HAS_ARCH_FEATURE (Prefer_ERMS)
        jnz     2f
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __mempcpy_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/mempcpy_chk.S b/sysdeps/x86_64/multiarch/mempcpy_chk.S
index 6927962e81a6683696a50fcfa3ba09351e9cd84e..072b22c49f660f15dd43c72b70f2fc92897850b6 100644 (file)
--- a/sysdeps/x86_64/multiarch/mempcpy_chk.S
+++ b/sysdeps/x86_64/multiarch/mempcpy_chk.S
@@ -30,6 +30,8 @@
 ENTRY(__mempcpy_chk)
        .type   __mempcpy_chk, @gnu_indirect_function
        LOAD_RTLD_GLOBAL_RO_RDX
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     1f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      1f
        lea     __mempcpy_chk_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memset.S b/sysdeps/x86_64/multiarch/memset.S
index c958b2f49fb5e5c04e5a0a790ee7a7912d8787ba..9d33118cf832b7c6c411e66bcd4d9d43d2d51893 100644 (file)
--- a/sysdeps/x86_64/multiarch/memset.S
+++ b/sysdeps/x86_64/multiarch/memset.S
@@ -41,6 +41,8 @@ ENTRY(memset)
        jnz     L(AVX512F)
        lea     __memset_avx2_unaligned(%rip), %RAX_LP
 L(AVX512F):
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     2f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      2f
        lea     __memset_avx512_no_vzeroupper(%rip), %RAX_LP

diff --git a/sysdeps/x86_64/multiarch/memset_chk.S b/sysdeps/x86_64/multiarch/memset_chk.S
index 79eaa37bb6291981ad9a648945f1735d427b2416..7e08311cdf48f88f5f2f1658e7c20f501ef210b9 100644 (file)
--- a/sysdeps/x86_64/multiarch/memset_chk.S
+++ b/sysdeps/x86_64/multiarch/memset_chk.S
@@ -38,6 +38,8 @@ ENTRY(__memset_chk)
        jnz     L(AVX512F)
        lea     __memset_chk_avx2_unaligned(%rip), %RAX_LP
 L(AVX512F):
+       HAS_ARCH_FEATURE (Prefer_No_AVX512)
+       jnz     2f
        HAS_ARCH_FEATURE (AVX512F_Usable)
        jz      2f
        lea     __memset_chk_avx512_no_vzeroupper(%rip), %RAX_LP