]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/display: Use HAS_LT_PHY() for LT PHY AUX power
authorGustavo Sousa <gustavo.sousa@intel.com>
Tue, 2 Dec 2025 01:23:06 +0000 (17:23 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Tue, 2 Dec 2025 18:08:08 +0000 (10:08 -0800)
Bspec states that the new AUX power enable/disable sequences are
associated with the LT PHY.  As such, use HAS_LT_PHY() instead of IP
checks in those paths in the driver code.

While at it, also move the comment that we can't use the power status
flag to the "else" branch, since that comment is not applicable for the
LT PHY.

Bspec: 68967
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Suggested-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patch.msgid.link/20251202012306.9315-9-matthew.s.atwood@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
drivers/gpu/drm/i915/display/intel_display_power_well.c

index 3abfb17f8988a6ccdfaf408028e034bfc7d27de2..db185a8591339d9924c3ab55feaf2b274b6495d5 100644 (file)
@@ -1866,19 +1866,19 @@ static void xelpdp_aux_power_well_enable(struct intel_display *display,
                     XELPDP_DP_AUX_CH_CTL_POWER_REQUEST,
                     XELPDP_DP_AUX_CH_CTL_POWER_REQUEST);
 
-       /*
-        * The power status flag cannot be used to determine whether aux
-        * power wells have finished powering up.  Instead we're
-        * expected to just wait a fixed 600us after raising the request
-        * bit.
-        */
-       if (DISPLAY_VER(display) >= 35) {
+       if (HAS_LT_PHY(display)) {
                if (intel_de_wait_for_set_ms(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),
                                             XELPDP_DP_AUX_CH_CTL_POWER_STATUS, 2))
                        drm_warn(display->drm,
                                 "Timeout waiting for PHY %c AUX channel power to be up\n",
                                 phy_name(phy));
        } else {
+               /*
+                * The power status flag cannot be used to determine whether aux
+                * power wells have finished powering up.  Instead we're
+                * expected to just wait a fixed 600us after raising the request
+                * bit.
+                */
                usleep_range(600, 1200);
        }
 }
@@ -1893,7 +1893,7 @@ static void xelpdp_aux_power_well_disable(struct intel_display *display,
                     XELPDP_DP_AUX_CH_CTL_POWER_REQUEST,
                     0);
 
-       if (DISPLAY_VER(display) >= 35) {
+       if (HAS_LT_PHY(display)) {
                if (intel_de_wait_for_clear_ms(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),
                                               XELPDP_DP_AUX_CH_CTL_POWER_STATUS, 1))
                        drm_warn(display->drm,