XELPDP_DP_AUX_CH_CTL_POWER_REQUEST,
XELPDP_DP_AUX_CH_CTL_POWER_REQUEST);
- /*
- * The power status flag cannot be used to determine whether aux
- * power wells have finished powering up. Instead we're
- * expected to just wait a fixed 600us after raising the request
- * bit.
- */
- if (DISPLAY_VER(display) >= 35) {
+ if (HAS_LT_PHY(display)) {
if (intel_de_wait_for_set_ms(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),
XELPDP_DP_AUX_CH_CTL_POWER_STATUS, 2))
drm_warn(display->drm,
"Timeout waiting for PHY %c AUX channel power to be up\n",
phy_name(phy));
} else {
+ /*
+ * The power status flag cannot be used to determine whether aux
+ * power wells have finished powering up. Instead we're
+ * expected to just wait a fixed 600us after raising the request
+ * bit.
+ */
usleep_range(600, 1200);
}
}
XELPDP_DP_AUX_CH_CTL_POWER_REQUEST,
0);
- if (DISPLAY_VER(display) >= 35) {
+ if (HAS_LT_PHY(display)) {
if (intel_de_wait_for_clear_ms(display, XELPDP_DP_AUX_CH_CTL(display, aux_ch),
XELPDP_DP_AUX_CH_CTL_POWER_STATUS, 1))
drm_warn(display->drm,