]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
spi: imx: add 16/32 bits per word support for target PIO mode
authorCarlos Song <carlos.song@nxp.com>
Tue, 18 Nov 2025 06:50:12 +0000 (14:50 +0800)
committerMark Brown <broonie@kernel.org>
Tue, 18 Nov 2025 18:54:27 +0000 (18:54 +0000)
Enable 16/32 bits per word support for spi-imx target PIO mode.

Signed-off-by: Carlos Song <carlos.song@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20251118065012.1418279-1-carlos.song@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-imx.c

index edd33fc28c7d0511c94474cc14885242809c30e5..e889680a3002f758cccf3d5251709131c945e5f2 100644 (file)
@@ -425,8 +425,15 @@ static void spi_imx_buf_tx_swap(struct spi_imx_data *spi_imx)
 
 static void mx53_ecspi_rx_target(struct spi_imx_data *spi_imx)
 {
-       u32 val = ioread32be(spi_imx->base + MXC_CSPIRXDATA);
+       u32 val = readl(spi_imx->base + MXC_CSPIRXDATA);
+#ifdef __LITTLE_ENDIAN
+       unsigned int bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word);
 
+       if (bytes_per_word == 1)
+               swab32s(&val);
+       else if (bytes_per_word == 2)
+               swahw32s(&val);
+#endif
        if (spi_imx->rx_buf) {
                int n_bytes = spi_imx->target_burst % sizeof(val);
 
@@ -447,6 +454,9 @@ static void mx53_ecspi_tx_target(struct spi_imx_data *spi_imx)
 {
        u32 val = 0;
        int n_bytes = spi_imx->count % sizeof(val);
+#ifdef __LITTLE_ENDIAN
+       unsigned int bytes_per_word;
+#endif
 
        if (!n_bytes)
                n_bytes = sizeof(val);
@@ -459,7 +469,14 @@ static void mx53_ecspi_tx_target(struct spi_imx_data *spi_imx)
 
        spi_imx->count -= n_bytes;
 
-       iowrite32be(val, spi_imx->base + MXC_CSPITXDATA);
+#ifdef __LITTLE_ENDIAN
+       bytes_per_word = spi_imx_bytes_per_word(spi_imx->bits_per_word);
+       if (bytes_per_word == 1)
+               swab32s(&val);
+       else if (bytes_per_word == 2)
+               swahw32s(&val);
+#endif
+       writel(val, spi_imx->base + MXC_CSPITXDATA);
 }
 
 /* MX51 eCSPI */