Add NT_ARM_GCS and NT_RISCV_TAGGED_ADDR_CTRL from Linux 6.13 to elf.h

Linux 6.13 adds new ELF note types NT_ARM_GCS and
NT_RISCV_TAGGED_ADDR_CTRL.  Add these to glibc's elf.h.

Tested for x86_64.

diff --git a/elf/elf.h b/elf/elf.h
index c0f61489ecfb227f073371ae34c455f89b0e1bed..1e1a59c14d2eb5516e50261d02dc490085e24b2c 100644 (file)
--- a/elf/elf.h
+++ b/elf/elf.h
@@ -837,12 +837,15 @@ typedef struct
 #define NT_ARM_ZT      0x40d           /* ARM SME ZT registers.  */
 #define NT_ARM_FPMR    0x40e           /* ARM floating point mode register.  */
 #define NT_ARM_POE     0x40f           /* ARM POE registers.  */
+#define NT_ARM_GCS     0x410           /* ARM GCS state.  */
 #define NT_VMCOREDD    0x700           /* Vmcore Device Dump Note.  */
 #define NT_MIPS_DSP    0x800           /* MIPS DSP ASE registers.  */
 #define NT_MIPS_FP_MODE        0x801           /* MIPS floating-point mode.  */
 #define NT_MIPS_MSA    0x802           /* MIPS SIMD registers.  */
 #define NT_RISCV_CSR   0x900           /* RISC-V Control and Status Registers */
 #define NT_RISCV_VECTOR        0x901           /* RISC-V vector registers */
+#define NT_RISCV_TAGGED_ADDR_CTRL      0x902   /* RISC-V tagged
+                                                  address control */
 #define NT_LOONGARCH_CPUCFG    0xa00   /* LoongArch CPU config registers.  */
 #define NT_LOONGARCH_CSR       0xa01   /* LoongArch control and
                                           status registers.  */