]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: allwinner: a100: Add EMAC support
authorPaul Kocialkowski <paulk@sys-base.io>
Mon, 7 Jul 2025 16:51:54 +0000 (18:51 +0200)
committerChen-Yu Tsai <wens@csie.org>
Sat, 12 Jul 2025 07:44:27 +0000 (15:44 +0800)
The Allwinner A100/A133 Ethernet MAC (EMAC) is compatible with the A64
one and needs access to the syscon register for control of the
top-level integration of the unit.

Note that there are two such controllers on the sun50iw10 die, which are
the same unit with a different top-level syscon register offset.

Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250707165155.581579-4-paulk@sys-base.io
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi

index 7d5be09753715088b2d37cfd5cfc0cb601e94310..bb5f9e4f3d4213b5365c06c94dbf175db38eafcc 100644 (file)
                        #size-cells = <0>;
                };
 
+               emac0: ethernet@5020000 {
+                       compatible = "allwinner,sun50i-a100-emac",
+                                    "allwinner,sun50i-a64-emac";
+                       reg = <0x5020000 0x10000>;
+                       interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq";
+                       clocks = <&ccu CLK_BUS_EMAC>;
+                       clock-names = "stmmaceth";
+                       resets = <&ccu RST_BUS_EMAC>;
+                       reset-names = "stmmaceth";
+                       syscon = <&syscon>;
+                       status = "disabled";
+
+                       mdio0: mdio {
+                               compatible = "snps,dwmac-mdio";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
+
                ths: thermal-sensor@5070400 {
                        compatible = "allwinner,sun50i-a100-ths";
                        reg = <0x05070400 0x100>;