crypto: qat - restore ASYM service support for GEN6 devices

Support for asymmetric crypto services was not included in the qat_6xxx
by explicitly setting the asymmetric capabilities to 0 to allow for
additional testing.

Enable asymmetric crypto services on QAT GEN6 devices by setting the
appropriate capability flags.

Fixes: 17fd7514ae68 ("crypto: qat - add qat_6xxx driver")
Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c b/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c
index cc8554c65d0b63f5fa76a7a1e9ee15e0ef22bcf1..435d2ff38ab3ad2b73b1719eab2bfc0543d213fc 100644 (file)
--- a/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c
+++ b/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c
@@ -637,7 +637,15 @@ static u32 get_accel_cap(struct adf_accel_dev *accel_dev)
                capabilities_sym &= ~ICP_ACCEL_CAPABILITIES_CIPHER;
        }
 
-       capabilities_asym = 0;
+       capabilities_asym = ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC |
+                           ICP_ACCEL_CAPABILITIES_SM2 |
+                           ICP_ACCEL_CAPABILITIES_ECEDMONT;
+
+       if (fusectl1 & ICP_ACCEL_GEN6_MASK_PKE_SLICE) {
+               capabilities_asym &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC;
+               capabilities_asym &= ~ICP_ACCEL_CAPABILITIES_SM2;
+               capabilities_asym &= ~ICP_ACCEL_CAPABILITIES_ECEDMONT;
+       }
 
        capabilities_dc = ICP_ACCEL_CAPABILITIES_COMPRESSION |
                          ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION |