struct vxge_fifo *fifo = NULL;
struct vxgedev *vdev = NULL;
struct __vxge_hw_fifo *fifoh;
- struct __vxge_hw_device *hldev;
struct vxge_hw_fifo_txd *txdp;
vxge_trace();
vdev = (struct vxgedev *)netdev_priv(dev);
- hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
if (!is_vxge_card_up(vdev)) {
vxge_debug(VXGE_ERR,
void
vxge_device_unregister(struct __vxge_hw_device *hldev)
{
- struct vxgedev *vdev;
struct net_device *ndev;
ndev = hldev->ndev;
- vdev = netdev_priv(ndev);
unregister_netdev(ndev);
netdev_nullify(ndev);
struct vxgedev *vdev;
int i;
u8 revision, titan1;
- u32 host_type;
u32 function_mode;
unsigned long mmio_start, mmio_len;
void *bar0;
"%s:%d Vpath mask = %llx\n", __func__, __LINE__,
(unsigned long long)vpath_mask);
- host_type = hw_info.host_type;
fw_version = &hw_info.fw_version;
/* fail the driver loading if firmware is incompatible */
if ((fw_version->major != VXGE_CERT_FW_VER_MAJOR) ||
enum vxge_hw_status
vxge_hw_vpath_intr_enable(struct __vxge_hw_virtualpath *vpath)
{
- u64 val64;
struct vxge_hw_vpath_reg *vp_reg;
enum vxge_hw_status status = VXGE_HW_OK;
__vxge_hw_pio_mem_write32_upper((u32)VXGE_HW_INTR_MASK_ALL,
&vp_reg->xgmac_vp_int_status);
- val64 = readq(&vp_reg->vpath_general_int_status);
+ readq(&vp_reg->vpath_general_int_status);
/* Mask unwanted interrupts */
__vxge_hw_pio_mem_write32_upper((u32)VXGE_HW_INTR_MASK_ALL,
enum vxge_hw_status
vxge_hw_vpath_intr_disable(struct __vxge_hw_virtualpath *vpath)
{
- u64 val64;
enum vxge_hw_status status = VXGE_HW_OK;
struct vxge_hw_vpath_reg __iomem *vp_reg;
__vxge_hw_pio_mem_write32_upper((u32)VXGE_HW_INTR_MASK_ALL,
&vp_reg->vpath_general_int_mask);
- val64 = VXGE_HW_TIM_CLR_INT_EN_VP(1 << (16 - vpath->vp_id));
-
writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_mask);
__vxge_hw_pio_mem_write32_upper((u32)VXGE_HW_INTR_MASK_ALL,