]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
firmware: stratix10-svc: Add definition for voltage and temperature sensor
authorKhairul Anuar Romli <khairul.anuar.romli@altera.com>
Wed, 8 Oct 2025 09:09:05 +0000 (17:09 +0800)
committerDinh Nguyen <dinguyen@kernel.org>
Thu, 13 Nov 2025 12:32:57 +0000 (06:32 -0600)
Add entry in Stratix 10 Service Layer to support temperature and voltage
sensor.

Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
drivers/firmware/stratix10-svc.c
include/linux/firmware/intel/stratix10-smc.h
include/linux/firmware/intel/stratix10-svc-client.h

index e3f990d888d71829f0ab22b8a59aa7af0316bea0..5a32c1054bee1d05809bbe828880ce4f30534c96 100644 (file)
@@ -34,7 +34,7 @@
  * timeout is set to 30 seconds (30 * 1000) at Intel Stratix10 SoC.
  */
 #define SVC_NUM_DATA_IN_FIFO                   32
-#define SVC_NUM_CHANNEL                                3
+#define SVC_NUM_CHANNEL                                4
 #define FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS      200
 #define FPGA_CONFIG_STATUS_TIMEOUT_SEC         30
 #define BYTE_TO_WORD_SIZE              4
@@ -341,6 +341,8 @@ static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data,
        case COMMAND_RSU_MAX_RETRY:
        case COMMAND_RSU_DCMF_STATUS:
        case COMMAND_FIRMWARE_VERSION:
+       case COMMAND_HWMON_READTEMP:
+       case COMMAND_HWMON_READVOLT:
                cb_data->status = BIT(SVC_STATUS_OK);
                cb_data->kaddr1 = &res.a1;
                break;
@@ -525,7 +527,17 @@ static int svc_normal_to_secure_thread(void *data)
                        a1 = (unsigned long)pdata->paddr;
                        a2 = 0;
                        break;
-
+               /* for HWMON */
+               case COMMAND_HWMON_READTEMP:
+                       a0 = INTEL_SIP_SMC_HWMON_READTEMP;
+                       a1 = pdata->arg[0];
+                       a2 = 0;
+                       break;
+               case COMMAND_HWMON_READVOLT:
+                       a0 = INTEL_SIP_SMC_HWMON_READVOLT;
+                       a1 = pdata->arg[0];
+                       a2 = 0;
+                       break;
                /* for polling */
                case COMMAND_POLL_SERVICE_STATUS:
                        a0 = INTEL_SIP_SMC_SERVICE_COMPLETED;
@@ -1197,6 +1209,11 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev)
        chans[2].name = SVC_CLIENT_FCS;
        spin_lock_init(&chans[2].lock);
 
+       chans[3].scl = NULL;
+       chans[3].ctrl = controller;
+       chans[3].name = SVC_CLIENT_HWMON;
+       spin_lock_init(&chans[3].lock);
+
        list_add_tail(&controller->node, &svc_ctrl);
        platform_set_drvdata(pdev, controller);
 
index ee80ca4bb0d0c6d3aa99aeeca6a4980a315dcc43..7306dd243b2a2ac2fdd91d664fcceb1f506ab7b1 100644 (file)
@@ -620,4 +620,38 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
 #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA \
        INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FCS_GET_PROVISION_DATA)
 
+/**
+ * Request INTEL_SIP_SMC_HWMON_READTEMP
+ * Sync call to request temperature
+ *
+ * Call register usage:
+ * a0 Temperature Channel
+ * a1-a7 not used
+ *
+ * Return status
+ * a0 INTEL_SIP_SMC_STATUS_OK
+ * a1 Temperature Value
+ * a2-a3 not used
+ */
+#define INTEL_SIP_SMC_FUNCID_HWMON_READTEMP 32
+#define INTEL_SIP_SMC_HWMON_READTEMP \
+       INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_HWMON_READTEMP)
+
+/**
+ * Request INTEL_SIP_SMC_HWMON_READVOLT
+ * Sync call to request voltage
+ *
+ * Call register usage:
+ * a0 Voltage Channel
+ * a1-a7 not used
+ *
+ * Return status
+ * a0 INTEL_SIP_SMC_STATUS_OK
+ * a1 Voltage Value
+ * a2-a3 not used
+ */
+#define INTEL_SIP_SMC_FUNCID_HWMON_READVOLT 33
+#define INTEL_SIP_SMC_HWMON_READVOLT \
+       INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_HWMON_READVOLT)
+
 #endif
index 60ed82112680e3674b6b7e9852d315922ffff33e..520004a5f15dd1900903d65819f6b48e3723e56b 100644 (file)
  *
  * fpga: for FPGA configuration
  * rsu: for remote status update
+ * hwmon: for hardware monitoring (voltage and temperature)
  */
 #define SVC_CLIENT_FPGA                        "fpga"
 #define SVC_CLIENT_RSU                 "rsu"
 #define SVC_CLIENT_FCS                 "fcs"
+#define SVC_CLIENT_HWMON               "hwmon"
 
-/*
+/**
  * Status of the sent command, in bit number
  *
  * SVC_STATUS_OK:
@@ -70,6 +72,7 @@
 #define SVC_RSU_REQUEST_TIMEOUT_MS              300
 #define SVC_FCS_REQUEST_TIMEOUT_MS             2000
 #define SVC_COMPLETED_TIMEOUT_MS               30000
+#define SVC_HWMON_REQUEST_TIMEOUT_MS           300
 
 struct stratix10_svc_chan;
 
@@ -171,6 +174,9 @@ enum stratix10_svc_command_code {
        COMMAND_MBOX_SEND_CMD = 100,
        /* Non-mailbox SMC Call */
        COMMAND_SMC_SVC_VERSION = 200,
+       /* for HWMON */
+       COMMAND_HWMON_READTEMP,
+       COMMAND_HWMON_READVOLT
 };
 
 /**