re PR target/17025 (attribute regparm code-generation bug)

        PR target/17025
        * config/i386/i386.md (testqi_1_maybe_si, andqi_2_maybe_si): New.
        (test_qi_1, andqi_2): Do not promote to simode.

From-SVN: r91959

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bd1a39a1fce901288425e343b6662e7f08cbe3e5..47caee0b970559a5c74775604abfedb3b86e72f8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,8 +1,14 @@
+2004-12-09  Richard Henderson  <rth@redhat.com>
+
+       PR target/17025
+       * config/i386/i386.md (testqi_1_maybe_si, andqi_2_maybe_si): New.
+       (test_qi_1, andqi_2): Do not promote to simode.
+
 2004-12-07  David Mosberger  <davidm@hpl.hp.com>
 
-        PR target/18443
-        * config/ia64/ia64.c (ia64_assemble_integer): Add support for
-        emitting unaligned pointer-sized integers.
+       PR target/18443
+       * config/ia64/ia64.c (ia64_assemble_integer): Add support for
+       emitting unaligned pointer-sized integers.
 
 2004-12-05  Richard Henderson  <rth@redhat.com>
 

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 0191cf7a5f28818a21b0be18a7603a5c01154996..69c3325cf73927544115d5caeba1c83a3f03e619 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7559,17 +7559,21 @@
   ""
   "")
 
-(define_insn "*testqi_1"
+(define_insn "*testqi_1_maybe_si"
   [(set (reg 17)
-        (compare (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm,r")
-                        (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n"))
-                (const_int 0)))]
-  "ix86_match_ccmode (insn, CCNOmode)"
+        (compare
+         (and:QI
+           (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm,r")
+           (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n"))
+         (const_int 0)))]
+   "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
+    && ix86_match_ccmode (insn,
+                         GET_CODE (operands[1]) == CONST_INT
+                         && INTVAL (operands[1]) >= 0 ? CCNOmode : CCZmode)"
 {
   if (which_alternative == 3)
     {
-      if (GET_CODE (operands[1]) == CONST_INT
-         && (INTVAL (operands[1]) & 0xffffff00))
+      if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) < 0)
        operands[1] = GEN_INT (INTVAL (operands[1]) & 0xff);
       return "test{l}\t{%1, %k0|%k0, %1}";
     }
@@ -7580,6 +7584,18 @@
    (set_attr "mode" "QI,QI,QI,SI")
    (set_attr "pent_pair" "uv,np,uv,np")])
 
+(define_insn "*testqi_1"
+  [(set (reg 17)
+        (compare (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm")
+                        (match_operand:QI 1 "nonmemory_operand" "n,n,qn"))
+                (const_int 0)))]
+  "ix86_match_ccmode (insn, CCNOmode)"
+  "test{b}\t{%1, %0|%0, %1}"
+  [(set_attr "type" "test")
+   (set_attr "modrm" "0,1,1")
+   (set_attr "mode" "QI")
+   (set_attr "pent_pair" "uv,np,uv")])
+
 (define_expand "testqi_ext_ccno_0"
   [(set (reg:CCNO 17)
        (compare:CCNO
@@ -8066,7 +8082,7 @@
   [(set_attr "type" "alu1")
    (set_attr "mode" "QI")])
 
-(define_insn "*andqi_2"
+(define_insn "*andqi_2_maybe_si"
   [(set (reg 17)
        (compare (and:QI
                   (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
@@ -8074,13 +8090,14 @@
                 (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,*r")
        (and:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
-   && ix86_binary_operator_ok (AND, QImode, operands)"
+   "ix86_binary_operator_ok (AND, QImode, operands)
+    && ix86_match_ccmode (insn,
+                         GET_CODE (operands[2]) == CONST_INT
+                         && INTVAL (operands[2]) >= 0 ? CCNOmode : CCZmode)"
 {
   if (which_alternative == 2)
     {
-      if (GET_CODE (operands[2]) == CONST_INT
-          && (INTVAL (operands[2]) & 0xffffff00))
+      if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0)
         operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff);
       return "and{l}\t{%2, %k0|%k0, %2}";
     }
@@ -8089,6 +8106,20 @@
   [(set_attr "type" "alu")
    (set_attr "mode" "QI,QI,SI")])
 
+(define_insn "*andqi_2"
+  [(set (reg 17)
+       (compare (and:QI
+                  (match_operand:QI 1 "nonimmediate_operand" "%0,0")
+                  (match_operand:QI 2 "general_operand" "qim,qi"))
+                (const_int 0)))
+   (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
+       (and:QI (match_dup 1) (match_dup 2)))]
+  "ix86_match_ccmode (insn, CCNOmode)
+   && ix86_binary_operator_ok (AND, QImode, operands)"
+  "and{b}\t{%2, %0|%0, %2}"
+  [(set_attr "type" "alu")
+   (set_attr "mode" "QI")])
+
 (define_insn "*andqi_2_slp"
   [(set (reg 17)
        (compare (and:QI