arm64: dts: qcom: monaco: Add CTCU and ETR nodes

Add CTCU and ETR nodes in DT to enable expected functionalities.

Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251103-enable-ctcu-for-monaco-v4-2-92ff83201584@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 31b4145a1d234e7a4e1b8e9f4831173f3cc867c6..83780cd3dc8ae3593f93794e3f95fc84ccab1f07 100644 (file)
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -2873,6 +2873,35 @@
                        qcom,bcm-voters = <&apps_bcm_voter>;
                };
 
+               ctcu@4001000 {
+                       compatible = "qcom,qcs8300-ctcu", "qcom,sa8775p-ctcu";
+                       reg = <0x0 0x04001000 0x0 0x1000>;
+
+                       clocks = <&aoss_qmp>;
+                       clock-names = "apb";
+
+                       in-ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       ctcu_in0: endpoint {
+                                               remote-endpoint = <&etr0_out>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       ctcu_in1: endpoint {
+                                               remote-endpoint = <&etr1_out>;
+                                       };
+                               };
+                       };
+               };
+
                stm@4002000 {
                        compatible = "arm,coresight-stm", "arm,primecell";
                        reg = <0x0 0x04002000 0x0 0x1000>,
@@ -2903,6 +2932,14 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
 
+                               port@0 {
+                                       reg = <0>;
+
+                                       swao_rep_out0: endpoint {
+                                               remote-endpoint = <&qdss_rep_in>;
+                                       };
+                               };
+
                                port@1 {
                                        reg = <1>;
 
@@ -3067,6 +3104,122 @@
                        };
                };
 
+               replicator@4046000 {
+                       compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+                       reg = <0x0 0x04046000 0x0 0x1000>;
+
+                       clocks = <&aoss_qmp>;
+                       clock-names = "apb_pclk";
+
+                       in-ports {
+                               port {
+                                       qdss_rep_in: endpoint {
+                                               remote-endpoint = <&swao_rep_out0>;
+                                       };
+                               };
+                       };
+
+                       out-ports {
+                               port {
+                                       qdss_rep_out0: endpoint {
+                                               remote-endpoint = <&etr_rep_in>;
+                                       };
+                               };
+                       };
+               };
+
+               tmc@4048000 {
+                       compatible = "arm,coresight-tmc", "arm,primecell";
+                       reg = <0x0 0x04048000 0x0 0x1000>;
+
+                       clocks = <&aoss_qmp>;
+                       clock-names = "apb_pclk";
+                       iommus = <&apps_smmu 0x04c0 0x00>;
+
+                       arm,scatter-gather;
+
+                       in-ports {
+                               port {
+                                       etr0_in: endpoint {
+                                               remote-endpoint = <&etr_rep_out0>;
+                                       };
+                               };
+                       };
+
+                       out-ports {
+                               port {
+                                       etr0_out: endpoint {
+                                               remote-endpoint = <&ctcu_in0>;
+                                       };
+                               };
+                       };
+               };
+
+               replicator@404e000 {
+                       compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+                       reg = <0x0 0x0404e000 0x0 0x1000>;
+
+                       clocks = <&aoss_qmp>;
+                       clock-names = "apb_pclk";
+
+                       in-ports {
+                               port {
+                                       etr_rep_in: endpoint {
+                                               remote-endpoint = <&qdss_rep_out0>;
+                                       };
+                               };
+                       };
+
+                       out-ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       etr_rep_out0: endpoint {
+                                               remote-endpoint = <&etr0_in>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       etr_rep_out1: endpoint {
+                                               remote-endpoint = <&etr1_in>;
+                                       };
+                               };
+                       };
+               };
+
+               tmc@404f000 {
+                       compatible = "arm,coresight-tmc", "arm,primecell";
+                       reg = <0x0 0x0404f000 0x0 0x1000>;
+
+                       clocks = <&aoss_qmp>;
+                       clock-names = "apb_pclk";
+                       iommus = <&apps_smmu 0x04a0 0x40>;
+
+                       arm,scatter-gather;
+                       arm,buffer-size = <0x400000>;
+
+                       in-ports {
+                               port {
+                                       etr1_in: endpoint {
+                                               remote-endpoint = <&etr_rep_out1>;
+                                       };
+                               };
+                       };
+
+                       out-ports {
+                               port {
+                                       etr1_out: endpoint {
+                                               remote-endpoint = <&ctcu_in1>;
+                                       };
+                               };
+                       };
+               };
+
                tpdm@4841000 {
                        compatible = "qcom,coresight-tpdm", "arm,primecell";
                        reg = <0x0 0x04841000 0x0 0x1000>;