drm/msm: msm_fence.h: fix all kernel-doc warnings

Correct or add kernel-doc comments to eliminate all warnings:

Warning: drivers/gpu/drm/msm/msm_fence.h:27 Incorrect use of kernel-doc
 format: * last_fence:
Warning: drivers/gpu/drm/msm/msm_fence.h:36 Incorrect use of kernel-doc
 format: * completed_fence:
Warning: drivers/gpu/drm/msm/msm_fence.h:44 Incorrect use of kernel-doc
 format: * fenceptr:
Warning: drivers/gpu/drm/msm/msm_fence.h:65 Incorrect use of kernel-doc
 format: * next_deadline_fence:
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'dev' not
 described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'name' not
 described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'context' not
 described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'index' not
 described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'fence' not
 described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'there is no
 remaining pending work */ uint32_t last_fence' not described in
 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'updated from the CPU after interrupt * from GPU */ uint32_t completed_fence' not described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'fenceptr' not
 described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'spinlock' not
 described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'next_deadline'
 not described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member
 'next_deadline_fence' not described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'deadline_timer'
 not described in 'msm_fence_context'
Warning: drivers/gpu/drm/msm/msm_fence.h:74 struct member 'deadline_work'
 not described in 'msm_fence_context'

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/695667/
Link: https://lore.kernel.org/r/20251219184638.1813181-17-rdunlap@infradead.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/msm_fence.h b/drivers/gpu/drm/msm/msm_fence.h
index 148196375a0b6014fc5be22821b36d36ee387559..3317a485beef51a63266fc6371b8e7b08fe5cccd 100644 (file)
--- a/drivers/gpu/drm/msm/msm_fence.h
+++ b/drivers/gpu/drm/msm/msm_fence.h
@@ -16,34 +16,29 @@
  * incrementing fence seqno at the end of each submit
  */
 struct msm_fence_context {
+       /** @dev: the drm device */
        struct drm_device *dev;
-       /** name: human readable name for fence timeline */
+       /** @name: human readable name for fence timeline */
        char name[32];
-       /** context: see dma_fence_context_alloc() */
+       /** @context: see dma_fence_context_alloc() */
        unsigned context;
-       /** index: similar to context, but local to msm_fence_context's */
+       /** @index: similar to context, but local to msm_fence_context's */
        unsigned index;
-
        /**
-        * last_fence:
-        *
+        * @last_fence:
         * Last assigned fence, incremented each time a fence is created
         * on this fence context.  If last_fence == completed_fence,
         * there is no remaining pending work
         */
        uint32_t last_fence;
-
        /**
-        * completed_fence:
-        *
+        * @completed_fence:
         * The last completed fence, updated from the CPU after interrupt
         * from GPU
         */
        uint32_t completed_fence;
-
        /**
-        * fenceptr:
-        *
+        * @fenceptr:
         * The address that the GPU directly writes with completed fence
         * seqno.  This can be ahead of completed_fence.  We can peek at
         * this to see if a fence has already signaled but the CPU hasn't
@@ -51,6 +46,9 @@ struct msm_fence_context {
         */
        volatile uint32_t *fenceptr;
 
+       /**
+        * @spinlock: fence context spinlock
+        */
        spinlock_t spinlock;
 
        /*
@@ -59,18 +57,22 @@ struct msm_fence_context {
         * don't queue, so maybe that is ok
         */
 
-       /** next_deadline: Time of next deadline */
+       /** @next_deadline: Time of next deadline */
        ktime_t next_deadline;
-
        /**
-        * next_deadline_fence:
-        *
+        * @next_deadline_fence:
         * Fence value for next pending deadline.  The deadline timer is
         * canceled when this fence is signaled.
         */
        uint32_t next_deadline_fence;
-
+       /**
+        * @deadline_timer: tracks nearest deadline of a fence timeline and
+        * expires just before it.
+        */
        struct hrtimer deadline_timer;
+       /**
+        * @deadline_work: work to do after deadline_timer expires
+        */
        struct kthread_work deadline_work;
 };