/*
**test_bfcvtnq2_untied:
+** (
** mov v0.16b, v1.16b
** bfcvtn2 v0.8h, v2.4s
+** |
+** bfcvtn2 v1.8h, v2.4s
+** mov v0.16b, v1.16b
+** )
** ret
*/
bfloat16x8_t test_bfcvtnq2_untied (bfloat16x8_t unused, bfloat16x8_t inactive,
/*
**ufoo_untied:
+** (
** mov v0.8b, v1.8b
** bfdot v0.2s, (v2.4h, v3.4h|v3.4h, v2.4h)
+** |
+** bfdot v1.2s, (v2.4h, v3.4h|v3.4h, v2.4h)
+** mov v0.8b, v1.8b
+** )
** ret
*/
float32x2_t ufoo_untied(float32x4_t unused, float32x2_t r, bfloat16x4_t x, bfloat16x4_t y)
/*
**ufooq_lane_untied:
+** (
** mov v0.16b, v1.16b
** bfdot v0.4s, v2.8h, v3.2h\[1\]
+** |
+** bfdot v1.4s, v2.8h, v3.2h\[1\]
+** mov v0.16b, v1.16b
+** )
** ret
*/
float32x4_t ufooq_lane_untied(float32x4_t unused, float32x4_t r, bfloat16x8_t x, bfloat16x4_t y)
/*
**ufoo_untied:
+** (
** mov v0\.8b, v1\.8b
** usdot v0\.2s, v2\.8b, v3\.8b
+** |
+** usdot v1\.2s, v2\.8b, v3\.8b
+** mov v0\.8b, v1\.8b
+** )
** ret
*/
int32x2_t ufoo_untied (int32x2_t unused, int32x2_t r, uint8x8_t x, int8x8_t y)
/*
**ufooq_laneq_untied:
+** (
** mov v0\.16b, v1\.16b
** usdot v0\.4s, v2\.16b, v3\.4b\[3\]
+** |
+** usdot v1\.4s, v2\.16b, v3\.4b\[3\]
+** mov v0\.16b, v1\.16b
+** )
** ret
*/
int32x4_t ufooq_laneq_untied (int32x2_t unused, int32x4_t r, uint8x16_t x, int8x16_t y)
/*
** adda_d1_f16:
+** (
** mov v0\.h\[0\], v1\.h\[0\]
** fadda h0, p0, h0, z2\.h
+** |
+** fadda h1, p0, h1, z2\.h
+** mov v0\.h\[0\], v1\.h\[0\]
+** )
** ret
*/
TEST_FOLD_LEFT_D (adda_d1_f16, float16_t, svfloat16_t,
/*
** adda_d1_f32:
+** (
** fmov s0, s1
** fadda s0, p0, s0, z2\.s
+** |
+** fadda s1, p0, s1, z2\.s
+** fmov s0, s1
+** )
** ret
*/
TEST_FOLD_LEFT_D (adda_d1_f32, float32_t, svfloat32_t,
/*
** adda_d1_f64:
+** (
** fmov d0, d1
** fadda d0, p0, d0, z2\.d
+** |
+** fadda d1, p0, d1, z2\.d
+** fmov d0, d1
+** )
** ret
*/
TEST_FOLD_LEFT_D (adda_d1_f64, float64_t, svfloat64_t,
/*
** brka_b_m_untied:
+** (
** mov p0\.b, p2\.b
** brka p0\.b, p3/m, p1\.b
+** |
+** brka p2\.b, p3/m, p1\.b
+** mov p0\.b, p2\.b
+** )
** ret
*/
TEST_UNIFORM_P (brka_b_m_untied,
/*
** brkb_b_m_untied:
+** (
** mov p0\.b, p2\.b
** brkb p0\.b, p3/m, p1\.b
+** |
+** brkb p2\.b, p3/m, p1\.b
+** mov p0\.b, p2\.b
+** )
** ret
*/
TEST_UNIFORM_P (brkb_b_m_untied,
/*
** brkn_b_z_untied:
+** (
** mov p0\.b, p2\.b
** brkn p0\.b, p3/z, p1\.b, p0\.b
+** |
+** brkn p2\.b, p3/z, p1\.b, p2\.b
+** mov p0\.b, p2\.b
+** )
** ret
*/
TEST_UNIFORM_P (brkn_b_z_untied,
/*
** clasta_d1_bf16:
+** (
** mov v0\.h\[0\], v1\.h\[0\]
** clasta h0, p0, h0, z2\.h
+** |
+** clasta h1, p0, h1, z2\.h
+** mov v0\.h\[0\], v1\.h\[0\]
+** )
** ret
*/
TEST_FOLD_LEFT_D (clasta_d1_bf16, bfloat16_t, svbfloat16_t,
/*
** clasta_d1_f16:
+** (
** mov v0\.h\[0\], v1\.h\[0\]
** clasta h0, p0, h0, z2\.h
+** |
+** clasta h1, p0, h1, z2\.h
+** mov v0\.h\[0\], v1\.h\[0\]
+** )
** ret
*/
TEST_FOLD_LEFT_D (clasta_d1_f16, float16_t, svfloat16_t,
/*
** clasta_d1_f32:
+** (
** fmov s0, s1
** clasta s0, p0, s0, z2\.s
+** |
+** clasta s1, p0, s1, z2\.s
+** fmov s0, s1
+** )
** ret
*/
TEST_FOLD_LEFT_D (clasta_d1_f32, float32_t, svfloat32_t,
/*
** clasta_d1_f64:
+** (
** fmov d0, d1
** clasta d0, p0, d0, z2\.d
+** |
+** clasta d1, p0, d1, z2\.d
+** fmov d0, d1
+** )
** ret
*/
TEST_FOLD_LEFT_D (clasta_d1_f64, float64_t, svfloat64_t,
/*
** clastb_d1_bf16:
+** (
** mov v0\.h\[0\], v1\.h\[0\]
** clastb h0, p0, h0, z2\.h
+** |
+** clastb h1, p0, h1, z2\.h
+** mov v0\.h\[0\], v1\.h\[0\]
+** )
** ret
*/
TEST_FOLD_LEFT_D (clastb_d1_bf16, bfloat16_t, svbfloat16_t,
/*
** clastb_d1_f16:
+** (
** mov v0\.h\[0\], v1\.h\[0\]
** clastb h0, p0, h0, z2\.h
+** |
+** clastb h1, p0, h1, z2\.h
+** mov v0\.h\[0\], v1\.h\[0\]
+** )
** ret
*/
TEST_FOLD_LEFT_D (clastb_d1_f16, float16_t, svfloat16_t,
/*
** clastb_d1_f32:
+** (
** fmov s0, s1
** clastb s0, p0, s0, z2\.s
+** |
+** clastb s1, p0, s1, z2\.s
+** fmov s0, s1
+** )
** ret
*/
TEST_FOLD_LEFT_D (clastb_d1_f32, float32_t, svfloat32_t,
/*
** clastb_d1_f64:
+** (
** fmov d0, d1
** clastb d0, p0, d0, z2\.d
+** |
+** clastb d1, p0, d1, z2\.d
+** fmov d0, d1
+** )
** ret
*/
TEST_FOLD_LEFT_D (clastb_d1_f64, float64_t, svfloat64_t,
/*
** pfirst_b_untied:
+** (
** mov p0\.b, p1\.b
** pfirst p0\.b, p3, p0\.b
+** |
+** pfirst p1\.b, p3, p1\.b
+** mov p0\.b, p1\.b
+** )
** ret
*/
TEST_UNIFORM_P (pfirst_b_untied,
/*
** pnext_b16_untied:
+** (
** mov p0\.b, p1\.b
** pnext p0\.h, p3, p0\.h
+** |
+** pnext p1\.h, p3, p1\.h
+** mov p0\.b, p1\.b
+** )
** ret
*/
TEST_UNIFORM_P (pnext_b16_untied,
/*
** pnext_b32_untied:
+** (
** mov p0\.b, p1\.b
** pnext p0\.s, p3, p0\.s
+** |
+** pnext p1\.s, p3, p1\.s
+** mov p0\.b, p1\.b
+** )
** ret
*/
TEST_UNIFORM_P (pnext_b32_untied,
/*
** pnext_b64_untied:
+** (
** mov p0\.b, p1\.b
** pnext p0\.d, p3, p0\.d
+** |
+** pnext p1\.d, p3, p1\.d
+** mov p0\.b, p1\.b
+** )
** ret
*/
TEST_UNIFORM_P (pnext_b64_untied,
/*
** pnext_b8_untied:
+** (
** mov p0\.b, p1\.b
** pnext p0\.b, p3, p0\.b
+** |
+** pnext p1\.b, p3, p1\.b
+** mov p0\.b, p1\.b
+** )
** ret
*/
TEST_UNIFORM_P (pnext_b8_untied,
/*
** sli_0_s16_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.h, z2\.h, #0
+** |
+** sli z1\.h, z2\.h, #0
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_0_s16_untied, svint16_t,
/*
** sli_1_s16_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.h, z2\.h, #1
+** |
+** sli z1\.h, z2\.h, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_1_s16_untied, svint16_t,
/*
** sli_15_s16_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.h, z2\.h, #15
+** |
+** sli z1\.h, z2\.h, #15
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_15_s16_untied, svint16_t,
/*
** sli_0_s32_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.s, z2\.s, #0
+** |
+** sli z1\.s, z2\.s, #0
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_0_s32_untied, svint32_t,
/*
** sli_1_s32_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.s, z2\.s, #1
+** |
+** sli z1\.s, z2\.s, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_1_s32_untied, svint32_t,
/*
** sli_31_s32_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.s, z2\.s, #31
+** |
+** sli z1\.s, z2\.s, #31
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_31_s32_untied, svint32_t,
/*
** sli_0_s64_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.d, z2\.d, #0
+** |
+** sli z1\.d, z2\.d, #0
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_0_s64_untied, svint64_t,
/*
** sli_1_s64_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.d, z2\.d, #1
+** |
+** sli z1\.d, z2\.d, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_1_s64_untied, svint64_t,
/*
** sli_63_s64_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.d, z2\.d, #63
+** |
+** sli z1\.d, z2\.d, #63
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_63_s64_untied, svint64_t,
/*
** sli_0_s8_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.b, z2\.b, #0
+** |
+** sli z1\.b, z2\.b, #0
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_0_s8_untied, svint8_t,
/*
** sli_1_s8_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.b, z2\.b, #1
+** |
+** sli z1\.b, z2\.b, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_1_s8_untied, svint8_t,
/*
** sli_7_s8_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.b, z2\.b, #7
+** |
+** sli z1\.b, z2\.b, #7
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_7_s8_untied, svint8_t,
/*
** sli_0_u16_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.h, z2\.h, #0
+** |
+** sli z1\.h, z2\.h, #0
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_0_u16_untied, svuint16_t,
/*
** sli_1_u16_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.h, z2\.h, #1
+** |
+** sli z1\.h, z2\.h, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_1_u16_untied, svuint16_t,
/*
** sli_15_u16_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.h, z2\.h, #15
+** |
+** sli z1\.h, z2\.h, #15
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_15_u16_untied, svuint16_t,
/*
** sli_0_u32_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.s, z2\.s, #0
+** |
+** sli z1\.s, z2\.s, #0
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_0_u32_untied, svuint32_t,
/*
** sli_1_u32_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.s, z2\.s, #1
+** |
+** sli z1\.s, z2\.s, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_1_u32_untied, svuint32_t,
/*
** sli_31_u32_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.s, z2\.s, #31
+** |
+** sli z1\.s, z2\.s, #31
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_31_u32_untied, svuint32_t,
/*
** sli_0_u64_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.d, z2\.d, #0
+** |
+** sli z1\.d, z2\.d, #0
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_0_u64_untied, svuint64_t,
/*
** sli_1_u64_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.d, z2\.d, #1
+** |
+** sli z1\.d, z2\.d, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_1_u64_untied, svuint64_t,
/*
** sli_63_u64_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.d, z2\.d, #63
+** |
+** sli z1\.d, z2\.d, #63
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_63_u64_untied, svuint64_t,
/*
** sli_0_u8_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.b, z2\.b, #0
+** |
+** sli z1\.b, z2\.b, #0
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_0_u8_untied, svuint8_t,
/*
** sli_1_u8_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.b, z2\.b, #1
+** |
+** sli z1\.b, z2\.b, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_1_u8_untied, svuint8_t,
/*
** sli_7_u8_untied:
+** (
** mov z0\.d, z1\.d
** sli z0\.b, z2\.b, #7
+** |
+** sli z1\.b, z2\.b, #7
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sli_7_u8_untied, svuint8_t,
/*
** sri_1_s16_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.h, z2\.h, #1
+** |
+** sri z1\.h, z2\.h, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_1_s16_untied, svint16_t,
/*
** sri_2_s16_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.h, z2\.h, #2
+** |
+** sri z1\.h, z2\.h, #2
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_2_s16_untied, svint16_t,
/*
** sri_16_s16_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.h, z2\.h, #16
+** |
+** sri z1\.h, z2\.h, #16
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_16_s16_untied, svint16_t,
/*
** sri_1_s32_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.s, z2\.s, #1
+** |
+** sri z1\.s, z2\.s, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_1_s32_untied, svint32_t,
/*
** sri_2_s32_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.s, z2\.s, #2
+** |
+** sri z1\.s, z2\.s, #2
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_2_s32_untied, svint32_t,
/*
** sri_32_s32_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.s, z2\.s, #32
+** |
+** sri z1\.s, z2\.s, #32
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_32_s32_untied, svint32_t,
/*
** sri_1_s64_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.d, z2\.d, #1
+** |
+** sri z1\.d, z2\.d, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_1_s64_untied, svint64_t,
/*
** sri_2_s64_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.d, z2\.d, #2
+** |
+** sri z1\.d, z2\.d, #2
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_2_s64_untied, svint64_t,
/*
** sri_64_s64_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.d, z2\.d, #64
+** |
+** sri z1\.d, z2\.d, #64
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_64_s64_untied, svint64_t,
/*
** sri_1_s8_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.b, z2\.b, #1
+** |
+** sri z1\.b, z2\.b, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_1_s8_untied, svint8_t,
/*
** sri_2_s8_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.b, z2\.b, #2
+** |
+** sri z1\.b, z2\.b, #2
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_2_s8_untied, svint8_t,
/*
** sri_8_s8_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.b, z2\.b, #8
+** |
+** sri z1\.b, z2\.b, #8
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_8_s8_untied, svint8_t,
/*
** sri_1_u16_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.h, z2\.h, #1
+** |
+** sri z1\.h, z2\.h, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_1_u16_untied, svuint16_t,
/*
** sri_2_u16_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.h, z2\.h, #2
+** |
+** sri z1\.h, z2\.h, #2
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_2_u16_untied, svuint16_t,
/*
** sri_16_u16_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.h, z2\.h, #16
+** |
+** sri z1\.h, z2\.h, #16
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_16_u16_untied, svuint16_t,
/*
** sri_1_u32_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.s, z2\.s, #1
+** |
+** sri z1\.s, z2\.s, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_1_u32_untied, svuint32_t,
/*
** sri_2_u32_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.s, z2\.s, #2
+** |
+** sri z1\.s, z2\.s, #2
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_2_u32_untied, svuint32_t,
/*
** sri_32_u32_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.s, z2\.s, #32
+** |
+** sri z1\.s, z2\.s, #32
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_32_u32_untied, svuint32_t,
/*
** sri_1_u64_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.d, z2\.d, #1
+** |
+** sri z1\.d, z2\.d, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_1_u64_untied, svuint64_t,
/*
** sri_2_u64_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.d, z2\.d, #2
+** |
+** sri z1\.d, z2\.d, #2
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_2_u64_untied, svuint64_t,
/*
** sri_64_u64_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.d, z2\.d, #64
+** |
+** sri z1\.d, z2\.d, #64
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_64_u64_untied, svuint64_t,
/*
** sri_1_u8_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.b, z2\.b, #1
+** |
+** sri z1\.b, z2\.b, #1
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_1_u8_untied, svuint8_t,
/*
** sri_2_u8_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.b, z2\.b, #2
+** |
+** sri z1\.b, z2\.b, #2
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_2_u8_untied, svuint8_t,
/*
** sri_8_u8_untied:
+** (
** mov z0\.d, z1\.d
** sri z0\.b, z2\.b, #8
+** |
+** sri z1\.b, z2\.b, #8
+** mov z0\.d, z1\.d
+** )
** ret
*/
TEST_UNIFORM_Z (sri_8_u8_untied, svuint8_t,