RISC-V: Export functions as global extern preparing for dynamic LMUL patch use

Notice those functions need to be use by COST model for dynamic LMUL use.
Extract as a single patch and committed.

gcc/ChangeLog:

	* config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
	(get_all_predecessors): New function.
	(get_all_successors): Ditto.
	* config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
	(get_all_successors): Ditto.
	* config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
	* config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index dd7aa360ec5b2c695e2212debbb500fdd3bffd46..0b4dd45380d194a5b5bc28ee9326cd33c94c4538 100644 (file)
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -365,6 +365,7 @@ enum avl_type
 /* Routines implemented in riscv-vector-builtins.cc.  */
 void init_builtins (void);
 const char *mangle_builtin_type (const_tree);
+tree lookup_vector_type_attribute (const_tree);
 #ifdef GCC_TARGET_H
 bool verify_type_context (location_t, type_context_kind, const_tree, bool);
 bool expand_vec_perm_const (machine_mode, machine_mode, rtx, rtx, rtx,
@@ -493,6 +494,8 @@ enum floating_point_rounding_mode get_frm_mode (rtx);
 opt_machine_mode vectorize_related_mode (machine_mode, scalar_mode,
                                         poly_uint64);
 unsigned int autovectorize_vector_modes (vec<machine_mode> *, bool);
+hash_set<basic_block> get_all_predecessors (basic_block);
+hash_set<basic_block> get_all_successors (basic_block);
 }
 
 /* We classify builtin types into two classes:

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 63945487006d199332ee860b8c7671dace438eea..1ca3f1dc8df54f01c0ab6d9ddbc923e841cd8c06 100644 (file)
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -3387,4 +3387,52 @@ expand_fold_extract_last (rtx *ops)
   emit_label (end_label);
 }
 
+hash_set<basic_block>
+get_all_predecessors (basic_block bb)
+{
+  hash_set<basic_block> blocks;
+  auto_vec<basic_block> work_list;
+  hash_set<basic_block> visited_list;
+  work_list.safe_push (bb);
+
+  while (!work_list.is_empty ())
+    {
+      basic_block new_bb = work_list.pop ();
+      visited_list.add (new_bb);
+      edge e;
+      edge_iterator ei;
+      FOR_EACH_EDGE (e, ei, new_bb->preds)
+       {
+         if (!visited_list.contains (e->src))
+           work_list.safe_push (e->src);
+         blocks.add (e->src);
+       }
+    }
+  return blocks;
+}
+
+hash_set<basic_block>
+get_all_successors (basic_block bb)
+{
+  hash_set<basic_block> blocks;
+  auto_vec<basic_block> work_list;
+  hash_set<basic_block> visited_list;
+  work_list.safe_push (bb);
+
+  while (!work_list.is_empty ())
+    {
+      basic_block new_bb = work_list.pop ();
+      visited_list.add (new_bb);
+      edge e;
+      edge_iterator ei;
+      FOR_EACH_EDGE (e, ei, new_bb->succs)
+       {
+         if (!visited_list.contains (e->dest))
+           work_list.safe_push (e->dest);
+         blocks.add (e->dest);
+       }
+    }
+  return blocks;
+}
+
 } // namespace riscv_vector

diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc
index 4a7eb47972e7d37410e0c6513c8025d1e07cff04..01a8d714db89fe5edd3d1d44dd956792bef44212 100644 (file)
--- a/gcc/config/riscv/riscv-vector-builtins.cc
+++ b/gcc/config/riscv/riscv-vector-builtins.cc
@@ -2671,7 +2671,7 @@ sizeless_type_p (const_tree type)
 
 /* If TYPE is an ABI-defined RVV type, return its attribute descriptor,
    otherwise return null.  */
-static tree
+tree
 lookup_vector_type_attribute (const_tree type)
 {
   if (type == error_mark_node)

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index a81bb53a5218f728ddeacad512f353093f596651..e7e5c14617ee6126f693dd747d7dc7ab47cfb64d 100644 (file)
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -521,31 +521,6 @@ get_same_bb_set (hash_set<set_info *> &sets, const basic_block cfg_bb)
   return nullptr;
 }
 
-/* Recursively find all predecessor blocks for cfg_bb. */
-static hash_set<basic_block>
-get_all_predecessors (basic_block cfg_bb)
-{
-  hash_set<basic_block> blocks;
-  auto_vec<basic_block> work_list;
-  hash_set<basic_block> visited_list;
-  work_list.safe_push (cfg_bb);
-
-  while (!work_list.is_empty ())
-    {
-      basic_block new_cfg_bb = work_list.pop ();
-      visited_list.add (new_cfg_bb);
-      edge e;
-      edge_iterator ei;
-      FOR_EACH_EDGE (e, ei, new_cfg_bb->preds)
-       {
-         if (!visited_list.contains (e->src))
-           work_list.safe_push (e->src);
-         blocks.add (e->src);
-       }
-    }
-  return blocks;
-}
-
 /* Helper function to get SEW operand. We always have SEW value for
    all RVV instructions that have VTYPE OP.  */
 static uint8_t