]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
mfd: palmas: Reset the POWERHOLD mux during power off
authorKeerthy <j-keerthy@ti.com>
Thu, 10 Nov 2016 05:09:18 +0000 (10:39 +0530)
committerSasha Levin <alexander.levin@microsoft.com>
Wed, 23 May 2018 01:33:50 +0000 (21:33 -0400)
[ Upstream commit 85fdaf8eb9bbec1f0f8a52fd5d85659d60738816 ]

POWERHOLD signal has higher priority  over the DEV_ON bit.
So power off will not happen if the POWERHOLD is held high.
Hence reset the MUX to GPIO_7 mode to release the POWERHOLD
and the DEV_ON bit to take effect to power off the PMIC.

PMIC Power off happens in dire situations like thermal shutdown
so irrespective of the POWERHOLD setting go ahead and turn off
the powerhold.  Currently poweroff is broken on boards that have
powerhold enabled. This fixes poweroff on those boards.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
drivers/mfd/palmas.c

index 28cb048f4760786630e03037be8a2fdf7fbc213e..907247bc2501de6566f6f0eafadae2585cbb127b 100644 (file)
@@ -430,6 +430,20 @@ static void palmas_power_off(void)
 {
        unsigned int addr;
        int ret, slave;
+       struct device_node *np = palmas_dev->dev->of_node;
+
+       if (of_property_read_bool(np, "ti,palmas-override-powerhold")) {
+               addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
+                                         PALMAS_PRIMARY_SECONDARY_PAD2);
+               slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
+
+               ret = regmap_update_bits(palmas_dev->regmap[slave], addr,
+                               PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK, 0);
+               if (ret)
+                       dev_err(palmas_dev->dev,
+                               "Unable to write PRIMARY_SECONDARY_PAD2 %d\n",
+                               ret);
+       }
 
        if (!palmas_dev)
                return;