ia64.md (rotlsi3_internal): Don't split if rotating by 16 bits.

2005-12-05  Jan Beulich  <jbeulich@novell.com>

	* config/ia64/ia64.md (rotlsi3_internal): Don't split if rotating by
	16 bits. Provide insn pattern for this case.

From-SVN: r108047

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5ba337727900239211ef797598fbac2894e4cf77..d397e4f3349633188878ea1d78e605b103e666a9 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2005-12-05  Jan Beulich  <jbeulich@novell.com>
+
+       * config/ia64/ia64.md (rotlsi3_internal): Don't split if rotating by
+       16 bits. Provide insn pattern for this case.
+
 2005-12-05  Jan Beulich  <jbeulich@novell.com>
 
        * libgcc2.c (__popcountSI2): Don't use wide type for iterator and

diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index 989a4fd0e161b3bbc3b79070afdd911f339ff7ea..afe3e53ba4dbb403e69a0f114afaba745d94b383 100644 (file)
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -4453,8 +4453,8 @@
        (rotate:SI (match_operand:SI 1 "gr_register_operand" "r")
                   (match_operand:SI 2 "shift_32bit_count_operand" "n")))]
   ""
-  "#"
-  "reload_completed"
+  "mux2 %0 = %1, 0xe1"
+  "reload_completed && INTVAL (operands[2]) != 16"
   [(set (match_dup 3)
        (ior:DI (zero_extend:DI (match_dup 1))
                (ashift:DI (zero_extend:DI (match_dup 1)) (const_int 32))))
@@ -4463,7 +4463,8 @@
 {
   operands[3] = gen_rtx_REG (DImode, REGNO (operands[0]));
   operands[2] = GEN_INT (32 - INTVAL (operands[2]));
-})
+}
+  [(set_attr "itanium_class" "mmshf")])
 \f
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