]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Daily bump.
authorGCC Administrator <gccadmin@gcc.gnu.org>
Thu, 12 Sep 2024 00:17:03 +0000 (00:17 +0000)
committerGCC Administrator <gccadmin@gcc.gnu.org>
Thu, 12 Sep 2024 00:17:03 +0000 (00:17 +0000)
gcc/ChangeLog
gcc/DATESTAMP
gcc/cp/ChangeLog
gcc/fortran/ChangeLog
gcc/testsuite/ChangeLog
libstdc++-v3/ChangeLog

index db0bfca969188a43d6844cb8e6817754ed01e356..ec0821e529987103a64c20f8eff99e50baa299c3 100644 (file)
@@ -1,3 +1,57 @@
+2024-09-11  Martin Jambor  <mjambor@suse.cz>
+
+       * ipa-cp.cc (propagate_vr_across_jump_function): Use
+       ipa_vr_supported_type_p instead of explicit check for integral and
+       pointer types.
+
+2024-09-11  Martin Jambor  <mjambor@suse.cz>
+
+       * ipa-cp.h (ipa_supports_p): Rename to ipa_vr_supported_type_p.
+       * ipa-cp.cc (ipa_vr_operation_and_type_effects): Adjust called
+       function name.
+       (propagate_vr_across_jump_function): Likewise.
+       * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Likewise.
+       (ipcp_get_parm_bits): Likewise.
+
+2024-09-11  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/116597
+       * config/arm/arm.cc (arm_function_ok_for_sibcall): Use the list of
+       actuals for the call, not the list of formals.
+
+2024-09-11  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/116674
+       * tree-vect-stmts.cc (vectorizable_simd_clone_call): Support
+       re-analysis.
+
+2024-09-11  Alex Coplan  <alex.coplan@arm.com>
+
+       PR libstdc++/116140
+       * lto-streamer-in.cc (input_struct_function_base): Stream in
+       fn->has_unroll.
+       * lto-streamer-out.cc (output_struct_function_base): Stream out
+       fn->has_unroll.
+
+2024-09-11  Tobias Burnus  <tburnus@baylibre.com>
+
+       * omp-general.cc (omp_runtime_api_procname): Add
+       omp_get_interop_{int,name,ptr,rc_desc,str,type_desc}
+       and omp_get_num_interop_properties.
+
+2024-09-11  Pan Li  <pan2.li@intel.com>
+
+       * match.pd: Add case 2 for the signed .SAT_ADD consumed by
+       vect pattern.
+       * tree-vect-patterns.cc (gimple_signed_integer_sat_add): Add new
+       matching func decl for signed .SAT_ADD.
+       (vect_recog_sat_add_pattern): Add signed .SAT_ADD pattern match.
+
+2024-09-11  liuhongt  <hongtao.liu@intel.com>
+
+       * config/i386/x86-tune.def (X86_TUNE_FUSE_MOV_AND_ALU): Enable
+       for GNR and GNR-D.
+
 2024-09-10  Prathamesh Kulkarni  <prathameshk@nvidia.com>
 
        PR target/96265
index 2abf40291e637bcc47bf71d2456e6034e3173229..8dcf10768ee44d59f7cbe5b89b15fab40052b00d 100644 (file)
@@ -1 +1 @@
-20240911
+20240912
index c8bbe3a58f7510842952e9c33c941a43c1257952..3f2e8ef479b4d298721b64951b77e6aa3cc3a7f5 100644 (file)
@@ -1,3 +1,10 @@
+2024-09-11  Alex Coplan  <alex.coplan@arm.com>
+
+       PR libstdc++/116140
+       * semantics.cc (anotate_saver): New. Use it ...
+       (maybe_convert_cond): ... here, to ensure any ANNOTATE_EXPRs
+       remain the outermost expression(s) of the condition.
+
 2024-09-10  Jakub Jelinek  <jakub@redhat.com>
 
        PR c++/116449
index 6e12d3b339e66c769a9e60c3484568e49b6fef3e..61e18b7ca70942ffae936379f926ac734a03fdfe 100644 (file)
@@ -1,3 +1,9 @@
+2024-09-11  Tobias Burnus  <tburnus@baylibre.com>
+
+       PR fortran/116661
+       * openmp.cc (gfc_match_omp_prefer_type): NULL init a gfc_expr
+       variable and use right locus in gfc_error.
+
 2024-09-09  David Malcolm  <dmalcolm@redhat.com>
 
        * cpp.cc (cb_cpp_diagnostic_cpp_option): Convert return type from
index 6fffbebb082e73ebca2c22ff4a89ca50350bb274..7df4c42285d950c72626e12fbbba92f5d6f8bd24 100644 (file)
@@ -1,3 +1,133 @@
+2024-09-11  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/116597
+       * gcc.target/arm/pac-sibcall-2.c: New test.
+       * gcc.target/arm/pac-sibcall-3.c: New test.
+
+2024-09-11  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/116674
+       * g++.dg/vect/pr116674.cc: New testcase.
+
+2024-09-11  Alex Coplan  <alex.coplan@arm.com>
+
+       PR libstdc++/116140
+       * g++.dg/ext/pragma-unroll-lambda-lto.C: New test.
+
+2024-09-11  Alex Coplan  <alex.coplan@arm.com>
+
+       PR libstdc++/116140
+       * lib/gcc-dg.exp (schedule-cleanups): Relax ltrans dumpfile
+       cleanup pattern to handle missing cases.
+
+2024-09-11  Alex Coplan  <alex.coplan@arm.com>
+
+       PR libstdc++/116140
+       * g++.dg/ext/pragma-unroll-lambda.C: New test.
+
+2024-09-11  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-1.c: Adjust
+       asm check and make it robust.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-10.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-11.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-12.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-4.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-9.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-25.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-26.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-27.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-28.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-29.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-30.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-31.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-4.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-5.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-6.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-7.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-10.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-11.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-12.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-13.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-14.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-15.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-17.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-18.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-19.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-2.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-20.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-21.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-22.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-23.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-24.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-3.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-4.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-5.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-6.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-7.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-9.c: Ditto.
+
 2024-09-10  Jakub Jelinek  <jakub@redhat.com>
 
        PR c++/116449
index 2540fd33bc6ba7e2da512ae7dcd52dc66e74b178..dcb20b02a8d4980ecada64d902f4096d49d0d161 100644 (file)
@@ -1,3 +1,9 @@
+2024-09-11  Alex Coplan  <alex.coplan@arm.com>
+
+       PR libstdc++/116140
+       * include/bits/stl_algobase.h (std::__find_if): Add #pragma to
+       request GCC to unroll the loop.
+
 2024-09-10  Jonathan Wakely  <jwakely@redhat.com>
 
        PR libstdc++/116159