KVM: nVMX: Switch to vmcs01 to update TPR threshold on-demand if L2 is active

If KVM updates L1's TPR Threshold while L2 is active, temporarily load
vmcs01 and immediately update TPR_THRESHOLD instead of deferring the
update until the next nested VM-Exit.  Deferring the TPR Threshold update
is relatively straightforward, but for several APICv related updates,
deferring updates creates ordering and state consistency problems, e.g.
KVM at-large thinks APICv is enabled, but vmcs01 is still running with
stale (and effectively unknown) state.

Reviewed-by: Chao Gao <chao.gao@intel.com>
Link: https://patch.msgid.link/20260109034532.1012993-4-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>

diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index e8adff614bd5bad7c0eadb7157cc617b6c3f99cf..b8c07fbc024e22e597fb82efed14d83f14a9e947 100644 (file)
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -2402,7 +2402,6 @@ static void prepare_vmcs02_early(struct vcpu_vmx *vmx, struct loaded_vmcs *vmcs0
        exec_control &= ~CPU_BASED_TPR_SHADOW;
        exec_control |= vmcs12->cpu_based_vm_exec_control;
 
-       vmx->nested.l1_tpr_threshold = -1;
        if (exec_control & CPU_BASED_TPR_SHADOW)
                vmcs_write32(TPR_THRESHOLD, vmcs12->tpr_threshold);
 #ifdef CONFIG_X86_64
@@ -5123,9 +5122,6 @@ void __nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_exit_reason,
        if (kvm_caps.has_tsc_control)
                vmcs_write64(TSC_MULTIPLIER, vcpu->arch.tsc_scaling_ratio);
 
-       if (vmx->nested.l1_tpr_threshold != -1)
-               vmcs_write32(TPR_THRESHOLD, vmx->nested.l1_tpr_threshold);
-
        if (vmx->nested.change_vmcs01_virtual_apic_mode) {
                vmx->nested.change_vmcs01_virtual_apic_mode = false;
                vmx_set_virtual_apic_mode(vcpu);

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 3aa0e055e2b06d5d9d69bd79de2d2d09f2a1dbea..074c9d01e7b31e2269945b9840ebebb4f9402ee5 100644 (file)
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -6836,11 +6836,10 @@ void vmx_update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
                nested_cpu_has(vmcs12, CPU_BASED_TPR_SHADOW))
                return;
 
+       guard(vmx_vmcs01)(vcpu);
+
        tpr_threshold = (irr == -1 || tpr < irr) ? 0 : irr;
-       if (is_guest_mode(vcpu))
-               to_vmx(vcpu)->nested.l1_tpr_threshold = tpr_threshold;
-       else
-               vmcs_write32(TPR_THRESHOLD, tpr_threshold);
+       vmcs_write32(TPR_THRESHOLD, tpr_threshold);
 }
 
 void vmx_set_virtual_apic_mode(struct kvm_vcpu *vcpu)

diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
index b44eda6225f453da21c371f5803e19899a0cab02..36f48c4b39c0d8950637cd38542889f72272f1b1 100644 (file)
--- a/arch/x86/kvm/vmx/vmx.h
+++ b/arch/x86/kvm/vmx/vmx.h
@@ -184,9 +184,6 @@ struct nested_vmx {
        u64 pre_vmenter_ssp;
        u64 pre_vmenter_ssp_tbl;
 
-       /* to migrate it to L1 if L2 writes to L1's CR8 directly */
-       int l1_tpr_threshold;
-
        u16 vpid02;
        u16 last_vpid;