pinctrl: renesas: rzg2l: Validate pins before setting mux function

Ensure only valid pins are configured by validating pin mappings before
setting the mux function.

Rename rzg2l_validate_gpio_pin() to rzg2l_validate_pin() to reflect its
broader purpose validating both GPIO pins and muxed pins. This helps
avoid invalid configurations.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250616132750.216368-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 59c32a0d87f19b9ed62aadb698dfb1793882f91a..2a10ae0bf5bdd97c10ff4fe4b890a70744a97578 100644 (file)
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -493,6 +493,23 @@ static void rzv2h_pmc_writeb(struct rzg2l_pinctrl *pctrl, u8 val, u16 offset)
        writeb(pwpr & ~PWPR_REGWE_A, pctrl->base + regs->pwpr);
 }
 
+static int rzg2l_validate_pin(struct rzg2l_pinctrl *pctrl,
+                             u64 cfg, u32 port, u8 bit)
+{
+       u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
+       u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg);
+       u64 data;
+
+       if (!(pinmap & BIT(bit)) || port >= pctrl->data->n_port_pins)
+               return -EINVAL;
+
+       data = pctrl->data->port_pin_configs[port];
+       if (off != RZG2L_PIN_CFG_TO_PORT_OFFSET(data))
+               return -EINVAL;
+
+       return 0;
+}
+
 static void rzg2l_pinctrl_set_pfc_mode(struct rzg2l_pinctrl *pctrl,
                                       u8 pin, u8 off, u8 func)
 {
@@ -536,6 +553,7 @@ static int rzg2l_pinctrl_set_mux(struct pinctrl_dev *pctldev,
        unsigned int i, *psel_val;
        struct group_desc *group;
        const unsigned int *pins;
+       int ret;
 
        func = pinmux_generic_get_function(pctldev, func_selector);
        if (!func)
@@ -552,6 +570,10 @@ static int rzg2l_pinctrl_set_mux(struct pinctrl_dev *pctldev,
                u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
                u32 pin = RZG2L_PIN_ID_TO_PIN(pins[i]);
 
+               ret = rzg2l_validate_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(pins[i]), pin);
+               if (ret)
+                       return ret;
+
                dev_dbg(pctrl->dev, "port:%u pin: %u off:%x PSEL:%u\n",
                        RZG2L_PIN_ID_TO_PORT(pins[i]), pin, off, psel_val[i] - hwcfg->func_base);
 
@@ -806,23 +828,6 @@ done:
        return ret;
 }
 
-static int rzg2l_validate_gpio_pin(struct rzg2l_pinctrl *pctrl,
-                                  u64 cfg, u32 port, u8 bit)
-{
-       u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
-       u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg);
-       u64 data;
-
-       if (!(pinmap & BIT(bit)) || port >= pctrl->data->n_port_pins)
-               return -EINVAL;
-
-       data = pctrl->data->port_pin_configs[port];
-       if (off != RZG2L_PIN_CFG_TO_PORT_OFFSET(data))
-               return -EINVAL;
-
-       return 0;
-}
-
 static u32 rzg2l_read_pin_config(struct rzg2l_pinctrl *pctrl, u32 offset,
                                 u8 bit, u32 mask)
 {
@@ -1287,7 +1292,7 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
        } else {
                bit = RZG2L_PIN_ID_TO_PIN(_pin);
 
-               if (rzg2l_validate_gpio_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(_pin), bit))
+               if (rzg2l_validate_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(_pin), bit))
                        return -EINVAL;
        }
 
@@ -1447,7 +1452,7 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
        } else {
                bit = RZG2L_PIN_ID_TO_PIN(_pin);
 
-               if (rzg2l_validate_gpio_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(_pin), bit))
+               if (rzg2l_validate_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(_pin), bit))
                        return -EINVAL;
        }
 
@@ -1687,7 +1692,7 @@ static int rzg2l_gpio_request(struct gpio_chip *chip, unsigned int offset)
        u8 reg8;
        int ret;
 
-       ret = rzg2l_validate_gpio_pin(pctrl, *pin_data, port, bit);
+       ret = rzg2l_validate_pin(pctrl, *pin_data, port, bit);
        if (ret)
                return ret;