backport: re PR target/33438 (ICE in cselib_record_set, at cselib.c:1515 on x86)

        Backport from mainline:
        2007-09-14  Uros Bizjak  <ubizjak@gmail.com>

        PR target/33438
        * config/i386/i386.md (fmodxf3): Copy operands[2] to temporary
        register when operands[2] equals operands[1].
        (dremxf3): Ditto.

        2007-09-10  Uros Bizjak  <ubizjak@gmail.com>

        PR target/33369
        * gcc/config/i386/sse.md (ashr<mode>3): Change op2 mode to SImode.
        Use 'N' operand constraint for op2.
        (lshr<mode>3): Ditto.
        (ashl<mode>3): Ditto.
        (vec_shl_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.
        (vec_shr_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.

        * gcc/config/i386/i386.c (ix86_expand_builtin) [IX86_BUILTIN_PSLL?128,
        IX86_BUILTIN_PSRA*?128, IX86_BUILTIN_PSRL?128]: Convert op1 to SImode.

testsuite/ChangeLog:

        Backport from mainline:
        2007-09-14  Uros Bizjak  <ubizjak@gmail.com>

        PR target/33438
        * gcc.target/i386/pr33438.c: New test.

        2007-09-10  Uros Bizjak  <ubizjak@gmail.com>

        PR target/33369
        * gcc.dg/vect/pr33369.c: New test.

From-SVN: r129201

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6e66ce47447cc5847d517b38189ec0e10f023b47..752b4f68d3db74781a49d30e616b19312001a7e7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,29 @@
+2007-10-10  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline:
+       2007-09-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/33438
+       * config/i386/i386.md (fmodxf3): Copy operands[2] to temporary
+       register when operands[2] equals operands[1].
+       (dremxf3): Ditto.
+
+       2007-09-10  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/33369
+       * gcc/config/i386/sse.md (ashr<mode>3): Change op2 mode to SImode.
+       Use 'N' operand constraint for op2.
+       (lshr<mode>3): Ditto.
+       (ashl<mode>3): Ditto.
+       (vec_shl_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.
+       (vec_shr_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.
+
+       * gcc/config/i386/i386.c (ix86_expand_builtin) [IX86_BUILTIN_PSLL?128,
+       IX86_BUILTIN_PSRA*?128, IX86_BUILTIN_PSRL?128]: Convert op1 to SImode.
+
 2007-10-10  Richard Guenther  <rguenther@suse.de>
 
-       Backport from mainline
+       Backport from mainline:
        2007-10-03  Doug Kwan  <dougkwan@google.com>
                Richard Guenther  <rguenther@suse.de>
 

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 5b4ea81a7eb15b3fd722b33cec76890aa8a71ae7..6da9fc0185074a64ca7298500c8da5bb9d2ff2bc 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -16295,8 +16295,8 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
       if (! (*insn_data[icode].operand[1].predicate) (op0, mode1))
        op0 = copy_to_reg (op0);
 
-      op1 = simplify_gen_subreg (TImode, op1, GET_MODE (op1), 0);
-      if (! (*insn_data[icode].operand[2].predicate) (op1, TImode))
+      op1 = simplify_gen_subreg (SImode, op1, GET_MODE (op1), 0);
+      if (! (*insn_data[icode].operand[2].predicate) (op1, SImode))
        op1 = copy_to_reg (op1);
 
       target = gen_reg_rtx (tmode);

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b688f8351987c553e36a1307e5ff9ac96efa8488..c69c3df4c5c606f0ad368edb09ffd4af8407b23e 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -15660,11 +15660,20 @@
 {
   rtx label = gen_label_rtx ();
 
-  emit_label (label);
+  rtx op2;
 
-  emit_insn (gen_fpremxf4 (operands[1], operands[2],
-                          operands[1], operands[2]));
+  if (rtx_equal_p (operands[1], operands[2]))
+    {
+      op2 = gen_reg_rtx (XFmode);
+      emit_move_insn (op2, operands[2]);
+    }
+  else
+    op2 = operands[2];
+
+  emit_label (label);
+  emit_insn (gen_fpremxf4 (operands[1], op2, operands[1], op2));
   ix86_emit_fp_unordered_jump (label);
+  LABEL_NUSES (label) = 1;
 
   emit_move_insn (operands[0], operands[1]);
   DONE;
@@ -15745,11 +15754,20 @@
 {
   rtx label = gen_label_rtx ();
 
-  emit_label (label);
+  rtx op2;
 
-  emit_insn (gen_fprem1xf4 (operands[1], operands[2],
-                           operands[1], operands[2]));
+  if (rtx_equal_p (operands[1], operands[2]))
+    {
+      op2 = gen_reg_rtx (XFmode);
+      emit_move_insn (op2, operands[2]);
+    }
+  else
+    op2 = operands[2];
+
+  emit_label (label);
+  emit_insn (gen_fprem1xf4 (operands[1], op2, operands[1], op2));
   ix86_emit_fp_unordered_jump (label);
+  LABEL_NUSES (label) = 1;
 
   emit_move_insn (operands[0], operands[1]);
   DONE;

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 165aa57eb794b39ecb72541e672767a358003851..0055acdbc08598cae866e6f4fe3e6cde635a5e03 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -2724,7 +2724,7 @@
   [(set (match_operand:SSEMODE24 0 "register_operand" "=x")
        (ashiftrt:SSEMODE24
          (match_operand:SSEMODE24 1 "register_operand" "0")
-         (match_operand:TI 2 "nonmemory_operand" "xn")))]
+         (match_operand:SI 2 "nonmemory_operand" "xN")))]
   "TARGET_SSE2"
   "psra<ssevecsize>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseishft")
@@ -2734,7 +2734,7 @@
   [(set (match_operand:SSEMODE248 0 "register_operand" "=x")
        (lshiftrt:SSEMODE248
          (match_operand:SSEMODE248 1 "register_operand" "0")
-         (match_operand:TI 2 "nonmemory_operand" "xn")))]
+         (match_operand:SI 2 "nonmemory_operand" "xN")))]
   "TARGET_SSE2"
   "psrl<ssevecsize>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseishft")
@@ -2744,7 +2744,7 @@
   [(set (match_operand:SSEMODE248 0 "register_operand" "=x")
        (ashift:SSEMODE248
          (match_operand:SSEMODE248 1 "register_operand" "0")
-         (match_operand:TI 2 "nonmemory_operand" "xn")))]
+         (match_operand:SI 2 "nonmemory_operand" "xN")))]
   "TARGET_SSE2"
   "psll<ssevecsize>\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseishft")
@@ -2765,11 +2765,9 @@
 (define_expand "vec_shl_<mode>"
   [(set (match_operand:SSEMODEI 0 "register_operand" "")
         (ashift:TI (match_operand:SSEMODEI 1 "register_operand" "")
-                  (match_operand:SI 2 "general_operand" "")))]
+                  (match_operand:SI 2 "const_0_to_255_mul_8_operand" "")))]
   "TARGET_SSE2"
 {
-  if (!const_0_to_255_mul_8_operand (operands[2], SImode))
-    FAIL;
   operands[0] = gen_lowpart (TImode, operands[0]);
   operands[1] = gen_lowpart (TImode, operands[1]);
 })
@@ -2789,11 +2787,9 @@
 (define_expand "vec_shr_<mode>"
   [(set (match_operand:SSEMODEI 0 "register_operand" "")
         (lshiftrt:TI (match_operand:SSEMODEI 1 "register_operand" "")
-                    (match_operand:SI 2 "general_operand" "")))]
+                    (match_operand:SI 2 "const_0_to_255_mul_8_operand" "")))]
   "TARGET_SSE2"
 {
-  if (!const_0_to_255_mul_8_operand (operands[2], SImode))
-    FAIL;
   operands[0] = gen_lowpart (TImode, operands[0]);
   operands[1] = gen_lowpart (TImode, operands[1]);
 })

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c6ad1cb32b5da3bf93fbf5b6a4965193bbd09b26..943268d495f5af399a432c2d2f1813f2d3001610 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,6 +1,19 @@
+2007-10-10  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline:
+       2007-09-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/33438
+       * gcc.target/i386/pr33438.c: New test.
+
+       2007-09-10  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/33369
+       * gcc.dg/vect/pr33369.c: New test.
+
 2007-10-10  Richard Guenther  <rguenther@suse.de>
 
-       Backport from mainline
+       Backport from mainline:
        2007-10-03  Doug Kwan  <dougkwan@google.com>
                Richard Guenther  <rguenther@suse.de>
 

diff --git a/gcc/testsuite/gcc.dg/vect/pr33369.c b/gcc/testsuite/gcc.dg/vect/pr33369.c
new file mode 100644 (file)
index 0000000..9979cbd
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr33369.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_shift } */
+
+typedef struct tagPOINT
+{
+  int x;
+  int y;
+} POINT;
+
+void
+f (POINT * ptBuf)
+{
+  int i;
+  for (i = 0; i < 4; i++)
+    {
+      ptBuf[i].x = ((ptBuf[i].x) << 4);
+      ptBuf[i].y = ((ptBuf[i].y) << 4);
+    }
+}
+
+/* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr33483.c b/gcc/testsuite/gcc.target/i386/pr33483.c
new file mode 100644 (file)
index 0000000..8fe2a94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr33483.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+long double f1 (long double x)
+{
+  return __builtin_fmodl (x, x);
+}
+
+long double f2 (long double x)
+{
+  return __builtin_remainderl (x, x);
+}