drm/amdgpu: support rlc_1 fw load for gc 12_1

Add support to load rlc firmware for rev_id 0 of gfx v12_1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
index c55f4055aa31feca6e3352556a140364627bfa11..885183eb7e7b2463596801fe7acd4723b5f8d580 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
@@ -61,7 +61,7 @@
 #define regCP_HQD_IB_CONTROL_DEFAULT                                              0x00100000
 
 MODULE_FIRMWARE("amdgpu/gc_12_1_0_mec.bin");
-MODULE_FIRMWARE("amdgpu/gc_12_1_0_rlc.bin");
+MODULE_FIRMWARE("amdgpu/gc_12_1_0_rlc_1.bin");
 
 #define SH_MEM_ALIGNMENT_MODE_UNALIGNED_GFX12_1_0      0x00000001
 #define DEFAULT_SH_MEM_CONFIG \
@@ -409,7 +409,13 @@ static int gfx_v12_1_init_microcode(struct amdgpu_device *adev)
        amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
 
        if (!amdgpu_sriov_vf(adev)) {
-               err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
+               if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 1, 0) &&
+                   adev->rev_id == 0)
+                       err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
+                                          AMDGPU_UCODE_REQUIRED,
+                                          "amdgpu/%s_rlc_1.bin", ucode_prefix);
+               else
+                       err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
                                           AMDGPU_UCODE_REQUIRED,
                                           "amdgpu/%s_rlc.bin", ucode_prefix);
                if (err)