s390: floating-point-support-enhancement facility related cleanups (BZ 509562)

The floating-point-support-enhancement facility is always present on the
supported machines.
- Remove VEX_HWCAPS_S390X_FGX and s390_host_has_fgx
- Remove wrapper functions: s390_emit_LGDRw, s390_emit_LDGRw

Part of fixing https://bugs.kde.org/show_bug.cgi?id=509562

diff --git a/VEX/priv/host_s390_defs.c b/VEX/priv/host_s390_defs.c
index dde8d65466a62f2be8604680505e91bf84f4d558..948eb977e9aecad4568a7319becef1a5d3a450a8 100644 (file)
--- a/VEX/priv/host_s390_defs.c
+++ b/VEX/priv/host_s390_defs.c
@@ -3658,8 +3658,6 @@ s390_emit_LDY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
 static UChar *
 s390_emit_LDGR(UChar *p, UChar r1, UChar r2)
 {
-   vassert(s390_host_has_fgx);
-
    if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
       S390_DISASM(MNM("ldgr"), FPR(r1), GPR(r2));
 
@@ -3670,8 +3668,6 @@ s390_emit_LDGR(UChar *p, UChar r1, UChar r2)
 static UChar *
 s390_emit_LGDR(UChar *p, UChar r1, UChar r2)
 {
-   vassert(s390_host_has_fgx);
-
    if (UNLIKELY(vex_traceflags & VEX_TRACE_ASM))
       S390_DISASM(MNM("lgdr"), GPR(r1), FPR(r2));
 
@@ -5086,39 +5082,9 @@ s390_emit_load_32imm(UChar *p, UChar reg, UInt val)
 }
 
 /*------------------------------------------------------------*/
-/*--- Wrapper functions                                    ---*/
+/*--- Emit functions for vector insns                      ---*/
 /*------------------------------------------------------------*/
 
-static UChar *
-s390_emit_LGDRw(UChar *p, UChar r1, UChar r2)
-{
-   if (s390_host_has_fgx) {
-      return s390_emit_LGDR(p, r1, r2);
-   }
-
-   /* Store the FPR at memory[sp - 8]. This is safe because SP grows towards
-      smaller addresses and is 8-byte aligned. Then load the GPR from that
-      memory location/ */
-   p = s390_emit_STDY(p, r2, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
-   return s390_emit_LG(p, r1, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
-}
-
-
-static UChar *
-s390_emit_LDGRw(UChar *p, UChar r1, UChar r2)
-{
-   if (s390_host_has_fgx) {
-      return s390_emit_LDGR(p, r1, r2);
-   }
-
-   /* Store the GPR at memory[sp - 8]. This is safe because SP grows towards
-      smaller addresses and is 8-byte aligned. Then load the FPR from that
-      memory location/ */
-   p = s390_emit_STG(p, r2, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
-   return s390_emit_LDY(p, r1, R0, S390_REGNO_STACK_POINTER, DISP20(-8));
-}
-
-
 static UChar *
 s390_emit_VL(UChar *p, UChar v1, UChar x2, UChar b2, UShort d2)
 {
@@ -8040,17 +8006,17 @@ s390_insn_move_emit(UChar *buf, const s390_insn *insn)
       if (dst_class == HRcFlt64 && src_class == HRcInt64) {
          if (insn->size == 4) {
             buf = s390_emit_SLLG(buf, R0, src, 0, DISP20(32)); /* r0 = src << 32 */
-            return s390_emit_LDGRw(buf, dst, R0);
+            return s390_emit_LDGR(buf, dst, R0);
          } else {
-            return s390_emit_LDGRw(buf, dst, src);
+            return s390_emit_LDGR(buf, dst, src);
          }
       }
       if (dst_class == HRcInt64 && src_class == HRcFlt64) {
          if (insn->size == 4) {
-            buf = s390_emit_LGDRw(buf, dst, src);
+            buf = s390_emit_LGDR(buf, dst, src);
             return s390_emit_SRLG(buf, dst, dst, 0, DISP20(32)); /* dst >>= 32 */
          } else {
-            return s390_emit_LGDRw(buf, dst, src);
+            return s390_emit_LGDR(buf, dst, src);
          }
       }
       if (dst_class == HRcFlt64 && src_class == HRcVec128) {

diff --git a/VEX/priv/host_s390_defs.h b/VEX/priv/host_s390_defs.h
index 1845ccd002dd4fb222752d12bd7635b8944c7b64..f62244dcfc7be1a4c5ae3a3e59485b53eac05ffd 100644 (file)
--- a/VEX/priv/host_s390_defs.h
+++ b/VEX/priv/host_s390_defs.h
@@ -918,8 +918,6 @@ VexInvalRange patchProfInc_S390(VexEndness endness_host,
 extern UInt s390_host_hwcaps;
 
 /* Convenience macros to test installed facilities */
-#define s390_host_has_fgx \
-                      (s390_host_hwcaps & (VEX_HWCAPS_S390X_FGX))
 #define s390_host_has_lsc \
                       (s390_host_hwcaps & (VEX_HWCAPS_S390X_LSC))
 #define s390_host_has_pfpo \

diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c
index c1cda11038f55182ba67d5902e5c8435f873cd66..ce6f6bd112ca5dee7f56276667352a7bbbc2a1a6 100644 (file)
--- a/VEX/priv/main_main.c
+++ b/VEX/priv/main_main.c
@@ -1902,7 +1902,6 @@ static const HChar* show_hwcaps_s390x ( UInt hwcaps )
       UInt  hwcaps_bit;
       HChar name[6];
    } hwcaps_list[] = {
-      { VEX_HWCAPS_S390X_FGX,   "fgx" },
       { VEX_HWCAPS_S390X_LSC,   "lsc" },
       { VEX_HWCAPS_S390X_PFPO,  "pfpo" },
       { VEX_HWCAPS_S390X_VX,    "vx" },

diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h
index b5ae0ebcc798372b75d9e2192e6bb05b288d8a8f..90fc9e39d5cd560cfd813a32071c88de4f69f8ab 100644 (file)
--- a/VEX/pub/libvex.h
+++ b/VEX/pub/libvex.h
@@ -162,7 +162,6 @@ typedef
 #define VEX_S390X_MODEL_UNKNOWN  19     /* always last in list */
 #define VEX_S390X_MODEL_MASK     0x3F
 
-#define VEX_HWCAPS_S390X_FGX   (1<<10)  /* FPR-GR transfer facility */
 #define VEX_HWCAPS_S390X_LSC   (1<<16)  /* Conditional load/store facility */
 #define VEX_HWCAPS_S390X_PFPO  (1<<17)  /* Perform floating point ops facility */
 #define VEX_HWCAPS_S390X_VX    (1<<18)  /* Vector facility */
@@ -178,8 +177,7 @@ typedef
 #define VEX_HWCAPS_S390X_MSA9  (1<<30)  /* Message-security-assist extension 9 */
 
 /* Special value representing all available s390x hwcaps */
-#define VEX_HWCAPS_S390X_ALL   (VEX_HWCAPS_S390X_FGX   | \
-                                VEX_HWCAPS_S390X_LSC   | \
+#define VEX_HWCAPS_S390X_ALL   (VEX_HWCAPS_S390X_LSC   | \
                                 VEX_HWCAPS_S390X_PFPO  | \
                                 VEX_HWCAPS_S390X_VX    | \
                                 VEX_HWCAPS_S390X_MSA5  | \

diff --git a/coregrind/m_machine.c b/coregrind/m_machine.c
index 7f794fd8732b76dc22a80d921919ca3db00b31e2..b25358ba07bd6123a4015112876e7cb25ff30c3b 100644 (file)
--- a/coregrind/m_machine.c
+++ b/coregrind/m_machine.c
@@ -1565,7 +1565,6 @@ Bool VG_(machine_get_hwcaps)( void )
         UInt hwcaps_bit;
         const HChar name[6];   // may need adjustment for new facility names
      } fac_hwcaps[] = {
-        { False,  41,  VEX_HWCAPS_S390X_FGX,   "FGX"   },
         { False,  45,  VEX_HWCAPS_S390X_LSC,   "LSC"   },
         { False,  44,  VEX_HWCAPS_S390X_PFPO,  "PFPO"  },
         { False, 129,  VEX_HWCAPS_S390X_VX,    "VX"    },