Move pcie extended access (64-bit address) to register access block.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
struct amdgpu_reg_access reg;
/* protects concurrent PCIE register access */
spinlock_t pcie_idx_lock;
- amdgpu_rreg_ext_t pcie_rreg_ext;
- amdgpu_wreg_ext_t pcie_wreg_ext;
amdgpu_rreg64_t pcie_rreg64;
amdgpu_wreg64_t pcie_wreg64;
amdgpu_rreg64_ext_t pcie_rreg64_ext;
#define WREG32_PCIE(reg, v) amdgpu_reg_pcie_wr32(adev, (reg), (v))
#define RREG32_PCIE_PORT(reg) amdgpu_reg_pciep_rd32(adev, (reg))
#define WREG32_PCIE_PORT(reg, v) amdgpu_reg_pciep_wr32(adev, (reg), (v))
-#define RREG32_PCIE_EXT(reg) adev->pcie_rreg_ext(adev, (reg))
-#define WREG32_PCIE_EXT(reg, v) adev->pcie_wreg_ext(adev, (reg), (v))
+#define RREG32_PCIE_EXT(reg) amdgpu_reg_pcie_ext_rd32(adev, (reg))
+#define WREG32_PCIE_EXT(reg, v) amdgpu_reg_pcie_ext_wr32(adev, (reg), (v))
#define RREG64_PCIE(reg) adev->pcie_rreg64(adev, (reg))
#define WREG64_PCIE(reg, v) adev->pcie_wreg64(adev, (reg), (v))
#define RREG64_PCIE_EXT(reg) adev->pcie_rreg64_ext(adev, (reg))
return adev->nbio.funcs->get_rev_id(adev);
}
-static uint32_t amdgpu_invalid_rreg_ext(struct amdgpu_device *adev, uint64_t reg)
-{
- dev_err(adev->dev, "Invalid callback to read register 0x%llX\n", reg);
- BUG();
- return 0;
-}
-
-static void amdgpu_invalid_wreg_ext(struct amdgpu_device *adev, uint64_t reg, uint32_t v)
-{
- dev_err(adev->dev,
- "Invalid callback to write register 0x%llX with 0x%08X\n", reg,
- v);
- BUG();
-}
-
/**
* amdgpu_invalid_rreg64 - dummy 64 bit reg read function
*
amdgpu_reg_access_init(adev);
- adev->pcie_rreg_ext = &amdgpu_invalid_rreg_ext;
- adev->pcie_wreg_ext = &amdgpu_invalid_wreg_ext;
adev->pcie_rreg64 = &amdgpu_invalid_rreg64;
adev->pcie_wreg64 = &amdgpu_invalid_wreg64;
adev->pcie_rreg64_ext = &amdgpu_invalid_rreg64_ext;
adev->reg.pcie.rreg = NULL;
adev->reg.pcie.wreg = NULL;
+ adev->reg.pcie.rreg_ext = NULL;
+ adev->reg.pcie.wreg_ext = NULL;
adev->reg.pcie.port_rreg = NULL;
adev->reg.pcie.port_wreg = NULL;
}
adev->reg.pcie.wreg(adev, reg, v);
}
+uint32_t amdgpu_reg_pcie_ext_rd32(struct amdgpu_device *adev, uint64_t reg)
+{
+ if (!adev->reg.pcie.rreg_ext) {
+ dev_err_once(adev->dev, "PCIE EXT register read not supported\n");
+ return 0;
+ }
+ return adev->reg.pcie.rreg_ext(adev, reg);
+}
+
+void amdgpu_reg_pcie_ext_wr32(struct amdgpu_device *adev, uint64_t reg,
+ uint32_t v)
+{
+ if (!adev->reg.pcie.wreg_ext) {
+ dev_err_once(adev->dev, "PCIE EXT register write not supported\n");
+ return;
+ }
+ adev->reg.pcie.wreg_ext(adev, reg, v);
+}
+
uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg)
{
if (!adev->reg.pcie.port_rreg) {
typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device *, uint32_t);
typedef void (*amdgpu_wreg_t)(struct amdgpu_device *, uint32_t, uint32_t);
+typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device *, uint64_t);
+typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device *, uint64_t, uint32_t);
typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device *, uint32_t,
uint32_t);
struct amdgpu_reg_pcie_ind {
amdgpu_rreg_t rreg;
amdgpu_wreg_t wreg;
+ amdgpu_rreg_ext_t rreg_ext;
+ amdgpu_wreg_ext_t wreg_ext;
amdgpu_rreg_t port_rreg;
amdgpu_wreg_t port_wreg;
};
uint32_t reg, uint32_t v);
uint32_t amdgpu_reg_pcie_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_pcie_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
+uint32_t amdgpu_reg_pcie_ext_rd32(struct amdgpu_device *adev, uint64_t reg);
+void amdgpu_reg_pcie_ext_wr32(struct amdgpu_device *adev, uint64_t reg,
+ uint32_t v);
uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg,
uint32_t v);
-typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device *, uint64_t);
-typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device *, uint64_t, uint32_t);
-
typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device *, uint32_t);
typedef void (*amdgpu_wreg64_t)(struct amdgpu_device *, uint32_t, uint64_t);
adev->nbio.funcs->set_reg_remap(adev);
adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
- adev->pcie_rreg_ext = &amdgpu_device_indirect_rreg_ext;
- adev->pcie_wreg_ext = &amdgpu_device_indirect_wreg_ext;
+ adev->reg.pcie.rreg_ext = &amdgpu_device_indirect_rreg_ext;
+ adev->reg.pcie.wreg_ext = &amdgpu_device_indirect_wreg_ext;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
adev->pcie_rreg64_ext = &amdgpu_device_indirect_rreg64_ext;
adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
- adev->pcie_rreg_ext = &amdgpu_device_indirect_rreg_ext;
- adev->pcie_wreg_ext = &amdgpu_device_indirect_wreg_ext;
+ adev->reg.pcie.rreg_ext = &amdgpu_device_indirect_rreg_ext;
+ adev->reg.pcie.wreg_ext = &amdgpu_device_indirect_wreg_ext;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;