arm: remove support for the iwmmxt ABI variant.

The iwmmxt ABI is a variant of the ABI that supported passing certain
parameters and results in iwmmxt registers.  But since we no-longer
support the instructions that can read and write these registers, the
ABI variant can no-longer be used.

gcc/ChangeLog:

	* config.gcc (arm, --with-abi): Remove iwmmxt abi option.
	* config/arm/arm.opt (enum ARM_ABI_IWMMXT): Remove.
	* config/arm/arm.h (TARGET_IWMMXT_ABI): Delete.
	(enum arm_pcs): Remove ARM_PCS_AAPCS_IWMMXT.
	(FUNCTION_ARG_REGNO_P): Remove IWMMXT ABI support.
	(CUMULATIVE_ARGS): Remove iwmmxt_nregs.
	* config/arm/arm.cc (arm_options_perform_arch_sanity_checks):
	Remove IWMMXT ABI checks.
	(arm_libcall_value_1): Likewise.
	(arm_function_value_regno_p): Likewise.
	(arm_apply_result_size): Remove adjustment for IWMMXT ABI.
	(arm_function_arg): Remove IWMMXT ABI support.
	(arm_arg_partial_bytes): Likewise.
	(arm_function_arg_advance): Likewise.
	(arm_init_cumulative_args): Don't initialize iwmmxt_nregs.
	* doc/invoke.texi (arm -mabi): Remove mention of the iwmmxt
	ABI option.
	* config/arm/arm-opts.h (enum arm_abi_type): Remove ARM_ABI_IWMMXT.

diff --git a/gcc/config.gcc b/gcc/config.gcc
index afbf82fd2b8f2e5cf914f50981a3c85938a88a92..c9fe996f2f7c2321f80b212f3199acb8c62886e3 100644 (file)
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4459,7 +4459,7 @@ case "${target}" in
 
                case "$with_abi" in
                "" \
-               | apcs-gnu | atpcs | aapcs | iwmmxt | aapcs-linux )
+               | apcs-gnu | atpcs | aapcs | aapcs-linux )
                        #OK
                        ;;
                *)

diff --git a/gcc/config/arm/arm-opts.h b/gcc/config/arm/arm-opts.h
index 06a1939d087f2bca22cd4c5659957c125de948b4..5c543bf52466726d94f673993f9e19475576b706 100644 (file)
--- a/gcc/config/arm/arm-opts.h
+++ b/gcc/config/arm/arm-opts.h
@@ -46,7 +46,6 @@ enum arm_abi_type
   ARM_ABI_APCS,
   ARM_ABI_ATPCS,
   ARM_ABI_AAPCS,
-  ARM_ABI_IWMMXT,
   ARM_ABI_AAPCS_LINUX
 };
 

diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 6bdb68aa788140aa66ee8eb9f2f53e67aa566629..663b58a581181c509c5a302bfe4f5f572be178eb 100644 (file)
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -4000,9 +4000,6 @@ arm_options_perform_arch_sanity_checks (void)
   if (TARGET_IWMMXT && !ARM_DOUBLEWORD_ALIGN)
     error ("iwmmxt requires an AAPCS compatible ABI for proper operation");
 
-  if (TARGET_IWMMXT_ABI && !TARGET_IWMMXT)
-    error ("iwmmxt abi requires an iwmmxt capable cpu");
-
   /* BPABI targets use linker tricks to allow interworking on cores
      without thumb support.  */
   if (TARGET_INTERWORK
@@ -4043,9 +4040,7 @@ arm_options_perform_arch_sanity_checks (void)
 
   if (TARGET_AAPCS_BASED)
     {
-      if (arm_abi == ARM_ABI_IWMMXT)
-       arm_pcs_default = ARM_PCS_AAPCS_IWMMXT;
-      else if (TARGET_HARD_FLOAT_ABI)
+      if (TARGET_HARD_FLOAT_ABI)
        {
          arm_pcs_default = ARM_PCS_AAPCS_VFP;
          if (!bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv2)
@@ -6048,9 +6043,6 @@ arm_libcall_value_1 (machine_mode mode)
 {
   if (TARGET_AAPCS_BASED)
     return aapcs_libcall_value (mode);
-  else if (TARGET_IWMMXT_ABI
-          && arm_vector_mode_supported_p (mode))
-    return gen_rtx_REG (mode, FIRST_IWMMXT_REGNUM);
   else
     return gen_rtx_REG (mode, ARG_REGISTER (1));
 }
@@ -6083,9 +6075,7 @@ arm_function_value_regno_p (const unsigned int regno)
       || (TARGET_32BIT
          && TARGET_AAPCS_BASED
          && TARGET_HARD_FLOAT
-         && regno == FIRST_VFP_REGNUM)
-      || (TARGET_IWMMXT_ABI
-         && regno == FIRST_IWMMXT_REGNUM))
+         && regno == FIRST_VFP_REGNUM))
     return true;
 
   return false;
@@ -6102,8 +6092,6 @@ arm_apply_result_size (void)
     {
       if (TARGET_HARD_FLOAT_ABI)
        size += 32;
-      if (TARGET_IWMMXT_ABI)
-       size += 8;
     }
 
   return size;
@@ -6265,7 +6253,6 @@ const struct pcs_attribute_arg
 #if 0
     /* We could recognize these, but changes would be needed elsewhere
      * to implement them.  */
-    {"aapcs-iwmmxt", ARM_PCS_AAPCS_IWMMXT},
     {"atpcs", ARM_PCS_ATPCS},
     {"apcs", ARM_PCS_APCS},
 #endif
@@ -7195,7 +7182,6 @@ arm_init_cumulative_args (CUMULATIVE_ARGS *pcum, tree fntype,
 
   /* On the ARM, the offset starts at 0.  */
   pcum->nregs = 0;
-  pcum->iwmmxt_nregs = 0;
   pcum->can_split = true;
 
   /* Varargs vectors are treated the same as long long.
@@ -7308,22 +7294,6 @@ arm_function_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
       return pcum->aapcs_reg;
     }
 
-  /* Varargs vectors are treated the same as long long.
-     named_count avoids having to change the way arm handles 'named' */
-  if (TARGET_IWMMXT_ABI
-      && arm_vector_mode_supported_p (arg.mode)
-      && pcum->named_count > pcum->nargs + 1)
-    {
-      if (pcum->iwmmxt_nregs <= 9)
-       return gen_rtx_REG (arg.mode,
-                           pcum->iwmmxt_nregs + FIRST_IWMMXT_REGNUM);
-      else
-       {
-         pcum->can_split = false;
-         return NULL_RTX;
-       }
-    }
-
   /* Put doubleword aligned quantities in even register pairs.  */
   if ((pcum->nregs & 1) && ARM_DOUBLEWORD_ALIGN)
     {
@@ -7383,9 +7353,6 @@ arm_arg_partial_bytes (cumulative_args_t pcum_v, const function_arg_info &arg)
       return pcum->aapcs_partial;
     }
 
-  if (TARGET_IWMMXT_ABI && arm_vector_mode_supported_p (arg.mode))
-    return 0;
-
   if (NUM_ARG_REGS > nregs
       && (NUM_ARG_REGS < nregs + ARM_NUM_REGS2 (arg.mode, arg.type))
       && pcum->can_split)
@@ -7422,12 +7389,7 @@ arm_function_arg_advance (cumulative_args_t pcum_v,
   else
     {
       pcum->nargs += 1;
-      if (arm_vector_mode_supported_p (arg.mode)
-         && pcum->named_count > pcum->nargs
-         && TARGET_IWMMXT_ABI)
-       pcum->iwmmxt_nregs += 1;
-      else
-       pcum->nregs += ARM_NUM_REGS2 (arg.mode, arg.type);
+      pcum->nregs += ARM_NUM_REGS2 (arg.mode, arg.type);
     }
 }
 

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index f8a2da32255af4d8a10167019f0f2d8b86a214d8..2f1edf2ebbd6684c4dd561e1da2c0e64093ebf15 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -143,7 +143,6 @@ emission of floating point pcs attributes.  */
                                         && !TARGET_GENERAL_REGS_ONLY)
 #define TARGET_REALLY_IWMMXT2          (TARGET_IWMMXT2 && TARGET_32BIT \
                                         && !TARGET_GENERAL_REGS_ONLY)
-#define TARGET_IWMMXT_ABI (TARGET_32BIT && arm_abi == ARM_ABI_IWMMXT)
 #define TARGET_ARM                      (! TARGET_THUMB)
 #define TARGET_EITHER                  1 /* (TARGET_ARM | TARGET_THUMB) */
 #define TARGET_BACKTRACE               (crtl->is_leaf \
@@ -1675,7 +1674,6 @@ enum arm_pcs
 {
   ARM_PCS_AAPCS,       /* Base standard AAPCS.  */
   ARM_PCS_AAPCS_VFP,   /* Use VFP registers for floating point values.  */
-  ARM_PCS_AAPCS_IWMMXT, /* Use iWMMXT registers for vectors.  */
   /* This must be the last AAPCS variant.  */
   ARM_PCS_AAPCS_LOCAL, /* Private call within this compilation unit.  */
   ARM_PCS_ATPCS,       /* ATPCS.  */
@@ -1693,8 +1691,6 @@ typedef struct
 {
   /* This is the number of registers of arguments scanned so far.  */
   int nregs;
-  /* This is the number of iWMMXt register arguments scanned so far.  */
-  int iwmmxt_nregs;
   int named_count;
   int nargs;
   /* Which procedure call variant to use for this call.  */
@@ -1742,9 +1738,7 @@ typedef struct
 #define FUNCTION_ARG_REGNO_P(REGNO)                                    \
    (IN_RANGE ((REGNO), 0, 3)                                           \
     || (TARGET_AAPCS_BASED && TARGET_HARD_FLOAT                                \
-       && IN_RANGE ((REGNO), FIRST_VFP_REGNUM, FIRST_VFP_REGNUM + 15)) \
-    || (TARGET_IWMMXT_ABI                                              \
-       && IN_RANGE ((REGNO), FIRST_IWMMXT_REGNUM, FIRST_IWMMXT_REGNUM + 9)))
+       && IN_RANGE ((REGNO), FIRST_VFP_REGNUM, FIRST_VFP_REGNUM + 15)))
 
 \f
 /* If your target environment doesn't prefix user functions with an

diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index 042cb54e05b95f5a2aacfb06449f6b39c1c253c7..d5eeeae7eaefa9354edede6f1919c4b663059f7c 100644 (file)
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -57,9 +57,6 @@ Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
 EnumValue
 Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
 
-EnumValue
-Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
-
 EnumValue
 Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
 

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index a0f1a93056776731151f641fcf5bc1e707675e49..699ee1cc0b7580d4729bbefff8f897eed1c3e49b 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -23520,7 +23520,7 @@ These @samp{-m} options are defined for the ARM port:
 @opindex mabi
 @item -mabi=@var{name}
 Generate code for the specified ABI@.  Permissible values are: @samp{apcs-gnu},
-@samp{atpcs}, @samp{aapcs}, @samp{aapcs-linux} and @samp{iwmmxt}.
+@samp{atpcs}, @samp{aapcs} and @samp{aapcs-linux}.
 
 @opindex mapcs-frame
 @item -mapcs-frame